From 09478dc331acb6e6819be2c9fda492f47a62c6e3 Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Sat, 31 Aug 1996 22:00:45 +0000 Subject: [PATCH] * v850-dis.c (disassemble): Handle insertion of ',', '[' and ']' characters into the output stream. * v850-opc.c (v850_opcodes: Remove size field from all opcodes. Add "memop" field to all opcodes (for the disassembler). Reorder opcodes so that "nop" comes before "mov" and "jr" comes before "jarl". Should give us a functional disassembler. --- opcodes/ChangeLog | 9 +++ opcodes/v850-opc.c | 160 ++++++++++++++++++++++----------------------- 2 files changed, 89 insertions(+), 80 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ba6cd41612c..67548405b94 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,6 +1,15 @@ start-sanitize-v850 Sat Aug 31 01:27:26 1996 Jeffrey A Law (law@cygnus.com) + * v850-dis.c (disassemble): Handle insertion of ',', '[' and + ']' characters into the output stream. + * v850-opc.c (v850_opcodes: Remove size field from all opcodes. + Add "memop" field to all opcodes (for the disassembler). + Reorder opcodes so that "nop" comes before "mov" and "jr" + comes before "jarl". + + * v850-dis.c (print_insn_v850): Fix typo in last change. + * v850-dis.c (print_insn_v850): Properly handle disassembling a two byte insn at the end of a memory region when the memory region's size is only two byte aligned. diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c index 56d3f7c6bc0..7b4534e0269 100644 --- a/opcodes/v850-opc.c +++ b/opcodes/v850-opc.c @@ -165,106 +165,106 @@ const struct v850_operand v850_operands[] = { const struct v850_opcode v850_opcodes[] = { /* load/store instructions */ -{ "sld.b", one(0x0300), one(0x0780), IF4A, 2 }, -{ "sld.h", one(0x0400), one(0x0780), IF4C, 2 }, -{ "sld.w", one(0x0500), one(0x0781), IF4E, 2 }, +{ "sld.b", one(0x0300), one(0x0780), IF4A, 1 }, +{ "sld.h", one(0x0400), one(0x0780), IF4C, 1 }, +{ "sld.w", one(0x0500), one(0x0781), IF4E, 1 }, { "sst.b", one(0x0380), one(0x0780), IF4B, 2 }, { "sst.h", one(0x0480), one(0x0780), IF4D, 2 }, { "sst.w", one(0x0501), one(0x0781), IF4F, 2 }, -{ "ld.b", two(0x0700,0x0000), two (0x07e0,0x0000), IF7C, 4 }, -{ "ld.h", two(0x0720,0x0000), two (0x07e0,0x0001), IF7A, 4 }, -{ "ld.w", two(0x0720,0x0001), two (0x07e0,0x0001), IF7A, 4 }, -{ "st.b", two(0x0740,0x0000), two (0x07e0,0x0000), IF7D, 4 }, -{ "st.h", two(0x0760,0x0000), two (0x07e0,0x0001), IF7B, 4 }, -{ "st.w", two(0x0760,0x0001), two (0x07e0,0x0001), IF7B, 4 }, +{ "ld.b", two(0x0700,0x0000), two (0x07e0,0x0000), IF7C, 1 }, +{ "ld.h", two(0x0720,0x0000), two (0x07e0,0x0001), IF7A, 1 }, +{ "ld.w", two(0x0720,0x0001), two (0x07e0,0x0001), IF7A, 1 }, +{ "st.b", two(0x0740,0x0000), two (0x07e0,0x0000), IF7D, 2 }, +{ "st.h", two(0x0760,0x0000), two (0x07e0,0x0001), IF7B, 2 }, +{ "st.w", two(0x0760,0x0001), two (0x07e0,0x0001), IF7B, 2 }, /* arithmetic operation instructions */ -{ "mov", OP(0x00), OP_MASK, IF1, 2 }, -{ "mov", OP(0x10), OP_MASK, IF2, 2 }, -{ "movea", OP(0x31), OP_MASK, IF6, 4 }, -{ "movhi", OP(0x32), OP_MASK, IF6, 4 }, -{ "add", OP(0x0e), OP_MASK, IF1, 2 }, -{ "add", OP(0x12), OP_MASK, IF2, 2 }, -{ "addi", OP(0x30), OP_MASK, IF6, 4 }, -{ "sub", OP(0x0d), OP_MASK, IF1, 2 }, -{ "subr", OP(0x0c), OP_MASK, IF1, 2 }, -{ "mulh", OP(0x07), OP_MASK, IF1, 2 }, -{ "mulh", OP(0x17), OP_MASK, IF2, 2 }, -{ "mulhi", OP(0x37), OP_MASK, IF6, 4 }, -{ "divh", OP(0x02), OP_MASK, IF1, 2 }, -{ "cmp", OP(0x0f), OP_MASK, IF1, 2 }, -{ "cmp", OP(0x13), OP_MASK, IF2, 2 }, -{ "setf", two(0x07e0,0x0000), two(0x07f0,0xffff), {CCCC,R2}, 4 }, +{ "nop", one(0x00), one(0xffff), {0}, 0 }, +{ "mov", OP(0x00), OP_MASK, IF1, 0 }, +{ "mov", OP(0x10), OP_MASK, IF2, 0 }, +{ "movea", OP(0x31), OP_MASK, IF6, 0 }, +{ "movhi", OP(0x32), OP_MASK, IF6, 0 }, +{ "add", OP(0x0e), OP_MASK, IF1, 0 }, +{ "add", OP(0x12), OP_MASK, IF2, 0 }, +{ "addi", OP(0x30), OP_MASK, IF6, 0 }, +{ "sub", OP(0x0d), OP_MASK, IF1, 0 }, +{ "subr", OP(0x0c), OP_MASK, IF1, 0 }, +{ "mulh", OP(0x07), OP_MASK, IF1, 0 }, +{ "mulh", OP(0x17), OP_MASK, IF2, 0 }, +{ "mulhi", OP(0x37), OP_MASK, IF6, 0 }, +{ "divh", OP(0x02), OP_MASK, IF1, 0 }, +{ "cmp", OP(0x0f), OP_MASK, IF1, 0 }, +{ "cmp", OP(0x13), OP_MASK, IF2, 0 }, +{ "setf", two(0x07e0,0x0000), two(0x07f0,0xffff), {CCCC,R2}, 0 }, /* saturated operation instructions */ -{ "satadd", OP(0x06), OP_MASK, IF1, 2 }, -{ "satadd", OP(0x11), OP_MASK, IF2, 2 }, -{ "satsub", OP(0x05), OP_MASK, IF1, 2 }, -{ "satsubi", OP(0x33), OP_MASK, IF6, 4 }, -{ "satsubr", OP(0x04), OP_MASK, IF1, 2 }, +{ "satadd", OP(0x06), OP_MASK, IF1, 0 }, +{ "satadd", OP(0x11), OP_MASK, IF2, 0 }, +{ "satsub", OP(0x05), OP_MASK, IF1, 0 }, +{ "satsubi", OP(0x33), OP_MASK, IF6, 0 }, +{ "satsubr", OP(0x04), OP_MASK, IF1, 0 }, /* logical operation instructions */ -{ "tst", OP(0x0b), OP_MASK, IF1, 2 }, -{ "or", OP(0x08), OP_MASK, IF1, 2 }, -{ "ori", OP(0x34), OP_MASK, IF6U, 4 }, -{ "and", OP(0x0a), OP_MASK, IF1, 2 }, -{ "andi", OP(0x36), OP_MASK, IF6U, 4 }, -{ "xor", OP(0x09), OP_MASK, IF1, 2 }, -{ "xori", OP(0x35), OP_MASK, IF6U, 4 }, -{ "not", OP(0x01), OP_MASK, IF1, 2 }, -{ "sar", OP(0x15), OP_MASK, {I5U, R2}, 2 }, -{ "sar", two(0x07e0,0x00a0), two(0x07e0,0xffff), {R1,R2}, 4 }, -{ "shl", OP(0x16), OP_MASK, {I5U, R2}, 2 }, -{ "shl", two(0x07e0,0x00c0), two(0x07e0,0xffff), {R1,R2}, 4 }, -{ "shr", OP(0x14), OP_MASK, {I5U, R2}, 2 }, -{ "shr", two(0x07e0,0x0080), two(0x07e0,0xffff), {R1,R2}, 4 }, +{ "tst", OP(0x0b), OP_MASK, IF1, 0 }, +{ "or", OP(0x08), OP_MASK, IF1, 0 }, +{ "ori", OP(0x34), OP_MASK, IF6U, 0 }, +{ "and", OP(0x0a), OP_MASK, IF1, 0 }, +{ "andi", OP(0x36), OP_MASK, IF6U, 0 }, +{ "xor", OP(0x09), OP_MASK, IF1, 0 }, +{ "xori", OP(0x35), OP_MASK, IF6U, 0 }, +{ "not", OP(0x01), OP_MASK, IF1, 0 }, +{ "sar", OP(0x15), OP_MASK, {I5U, R2}, 0 }, +{ "sar", two(0x07e0,0x00a0), two(0x07e0,0xffff), {R1,R2}, 0 }, +{ "shl", OP(0x16), OP_MASK, {I5U, R2}, 0 }, +{ "shl", two(0x07e0,0x00c0), two(0x07e0,0xffff), {R1,R2}, 0 }, +{ "shr", OP(0x14), OP_MASK, {I5U, R2}, 0 }, +{ "shr", two(0x07e0,0x0080), two(0x07e0,0xffff), {R1,R2}, 0 }, /* branch instructions */ /* signed integer */ -{ "bgt", BOP(0xf), BOP_MASK, IF3, 2 }, -{ "bge", BOP(0xe), BOP_MASK, IF3, 2 }, -{ "blt", BOP(0x6), BOP_MASK, IF3, 2 }, -{ "ble", BOP(0x7), BOP_MASK, IF3, 2 }, +{ "bgt", BOP(0xf), BOP_MASK, IF3, 0 }, +{ "bge", BOP(0xe), BOP_MASK, IF3, 0 }, +{ "blt", BOP(0x6), BOP_MASK, IF3, 0 }, +{ "ble", BOP(0x7), BOP_MASK, IF3, 0 }, /* unsigned integer */ -{ "bh", BOP(0xb), BOP_MASK, IF3, 2 }, -{ "bnh", BOP(0x3), BOP_MASK, IF3, 2 }, -{ "bl", BOP(0x1), BOP_MASK, IF3, 2 }, -{ "bnl", BOP(0x9), BOP_MASK, IF3, 2 }, +{ "bh", BOP(0xb), BOP_MASK, IF3, 0 }, +{ "bnh", BOP(0x3), BOP_MASK, IF3, 0 }, +{ "bl", BOP(0x1), BOP_MASK, IF3, 0 }, +{ "bnl", BOP(0x9), BOP_MASK, IF3, 0 }, /* common */ -{ "be", BOP(0x2), BOP_MASK, IF3, 2 }, -{ "bne", BOP(0xa), BOP_MASK, IF3, 2 }, +{ "be", BOP(0x2), BOP_MASK, IF3, 0 }, +{ "bne", BOP(0xa), BOP_MASK, IF3, 0 }, /* others */ -{ "bv", BOP(0x0), BOP_MASK, IF3, 2 }, -{ "bnv", BOP(0x8), BOP_MASK, IF3, 2 }, -{ "bn", BOP(0x4), BOP_MASK, IF3, 2 }, -{ "bp", BOP(0xc), BOP_MASK, IF3, 2 }, -{ "bc", BOP(0x1), BOP_MASK, IF3, 2 }, -{ "bnc", BOP(0x9), BOP_MASK, IF3, 2 }, -{ "bz", BOP(0x2), BOP_MASK, IF3, 2 }, -{ "bnz", BOP(0xa), BOP_MASK, IF3, 2 }, -{ "br", BOP(0x5), BOP_MASK, IF3, 2 }, -{ "bsa", BOP(0xd), BOP_MASK, IF3, 2 }, - -{ "jmp", one(0x0060), one(0xffe0), { R1}, 2 }, -{ "jarl", one(0x0780), two(0x07c0,0x0001),{ D22, R2 }, 4 }, -{ "jr", one(0x0780), two(0xffc0,0x0001),{ D22 }, 4 }, +{ "bv", BOP(0x0), BOP_MASK, IF3, 0 }, +{ "bnv", BOP(0x8), BOP_MASK, IF3, 0 }, +{ "bn", BOP(0x4), BOP_MASK, IF3, 0 }, +{ "bp", BOP(0xc), BOP_MASK, IF3, 0 }, +{ "bc", BOP(0x1), BOP_MASK, IF3, 0 }, +{ "bnc", BOP(0x9), BOP_MASK, IF3, 0 }, +{ "bz", BOP(0x2), BOP_MASK, IF3, 0 }, +{ "bnz", BOP(0xa), BOP_MASK, IF3, 0 }, +{ "br", BOP(0x5), BOP_MASK, IF3, 0 }, +{ "bsa", BOP(0xd), BOP_MASK, IF3, 0 }, + +{ "jmp", one(0x0060), one(0xffe0), { R1}, 1 }, +{ "jr", one(0x0780), two(0xffc0,0x0001),{ D22 }, 0 }, +{ "jarl", one(0x0780), two(0x07c0,0x0001),{ D22, R2 }, 0 }, /* bit manipulation instructions */ -{ "set1", two(0x07c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 4 }, -{ "not1", two(0x47c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 4 }, -{ "clr1", two(0x87c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 4 }, -{ "tst1", two(0xc7c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 4 }, +{ "set1", two(0x07c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 2 }, +{ "not1", two(0x47c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 2 }, +{ "clr1", two(0x87c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 2 }, +{ "tst1", two(0xc7c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 2 }, /* special instructions */ -{ "di", two(0x07e0,0x0160), two(0xffff,0xffff), {0}, 4 }, -{ "ei", two(0x87e0,0x0160), two(0xffff,0xffff), {0}, 4 }, -{ "halt", two(0x07e0,0x0120), two(0xffff,0xffff), {0}, 4 }, -{ "reti", two(0x07e0,0x0140), two(0xffff,0xffff), {0}, 4 }, -{ "trap", two(0x07e0,0x0100), two(0xffe0,0xffff), {I5U}, 4 }, -{ "ldsr", two(0x07e0,0x0020), two(0x07e0,0xffff), {R1,SR2}, 4 }, -{ "stsr", two(0x07e0,0x0040), two(0x07e0,0xffff), {SR1,R2}, 4 }, -{ "nop", one(0x00), one(0xffff), {0}, 2 }, +{ "di", two(0x07e0,0x0160), two(0xffff,0xffff), {0}, 0 }, +{ "ei", two(0x87e0,0x0160), two(0xffff,0xffff), {0}, 0 }, +{ "halt", two(0x07e0,0x0120), two(0xffff,0xffff), {0}, 0 }, +{ "reti", two(0x07e0,0x0140), two(0xffff,0xffff), {0}, 0 }, +{ "trap", two(0x07e0,0x0100), two(0xffe0,0xffff), {I5U}, 0 }, +{ "ldsr", two(0x07e0,0x0020), two(0x07e0,0xffff), {R1,SR2}, 0 }, +{ "stsr", two(0x07e0,0x0040), two(0x07e0,0xffff), {SR1,R2}, 0 }, { 0, 0, 0, {0}, 0 }, } ; -- 2.30.2