From 09cd6e06d2c7a54ca6eb8d3102822efa78e01a9c Mon Sep 17 00:00:00 2001 From: Paul Berry Date: Sat, 16 Feb 2013 09:49:11 -0800 Subject: [PATCH] i965/vs: Remove brw_vs_prog_data pointer from brw_vs_compile. In patches that follow, we'll be splitting structs brw_vs_prog_data and brw_vs_compile into a vec4-generic base struct and a VS-specific derived struct (this will allow the vec4-generic code to be re-used for geometry shaders). Having brw_vs_compile point to brw_vs_prog_data makes it difficult to do this cleanly. Fortunately most of the functions that use brw_vs_compile (those in the vec4_visitor class) already have access to brw_vs_prog_data through a separate pointer (vec4_visitor::prog_data). So all we have to do is use that pointer consistently, and plumb prog_data through the few remaining functions that need access to it. Reviewed-by: Jordan Justen Reviewed-by: Eric Anholt Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 19 ++++++------ src/mesa/drivers/dri/i965/brw_vec4.h | 1 + .../drivers/dri/i965/brw_vec4_visitor.cpp | 31 ++++++++++--------- src/mesa/drivers/dri/i965/brw_vec4_vp.cpp | 10 +++--- src/mesa/drivers/dri/i965/brw_vs.c | 28 +++++++++-------- src/mesa/drivers/dri/i965/brw_vs.h | 2 +- .../dri/i965/test_vec4_register_coalesce.cpp | 2 +- 7 files changed, 49 insertions(+), 44 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index ab1119e0671..f8ab9b63a81 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -423,8 +423,8 @@ vec4_visitor::pack_uniform_registers() /* Move the references to the data */ for (int j = 0; j < size; j++) { - c->prog_data.param[dst * 4 + new_chan[src] + j] = - c->prog_data.param[src * 4 + j]; + prog_data->param[dst * 4 + new_chan[src] + j] = + prog_data->param[src * 4 + j]; } this->uniform_vector_size[dst] += size; @@ -1248,12 +1248,12 @@ vec4_visitor::setup_attributes(int payload_reg) prog_data->urb_read_length = (nr_attributes + 1) / 2; - unsigned vue_entries = MAX2(nr_attributes, c->prog_data.vue_map.num_slots); + unsigned vue_entries = MAX2(nr_attributes, prog_data->vue_map.num_slots); if (intel->gen == 6) - c->prog_data.urb_entry_size = ALIGN(vue_entries, 8) / 8; + prog_data->urb_entry_size = ALIGN(vue_entries, 8) / 8; else - c->prog_data.urb_entry_size = ALIGN(vue_entries, 4) / 4; + prog_data->urb_entry_size = ALIGN(vue_entries, 4) / 4; return payload_reg + nr_attributes; } @@ -1270,7 +1270,7 @@ vec4_visitor::setup_uniforms(int reg) for (unsigned int i = 0; i < 4; i++) { unsigned int slot = this->uniforms * 4 + i; static float zero = 0.0; - c->prog_data.param[slot] = &zero; + prog_data->param[slot] = &zero; } this->uniforms++; @@ -1279,9 +1279,9 @@ vec4_visitor::setup_uniforms(int reg) reg += ALIGN(uniforms, 2) / 2; } - c->prog_data.nr_params = this->uniforms * 4; + prog_data->nr_params = this->uniforms * 4; - c->prog_data.curb_read_length = reg - 1; + prog_data->curb_read_length = reg - 1; return reg; } @@ -1500,6 +1500,7 @@ const unsigned * brw_vs_emit(struct brw_context *brw, struct gl_shader_program *prog, struct brw_vs_compile *c, + struct brw_vs_prog_data *prog_data, void *mem_ctx, unsigned *final_assembly_size) { @@ -1529,7 +1530,7 @@ brw_vs_emit(struct brw_context *brw, } } - vec4_visitor v(brw, c, prog, shader, mem_ctx); + vec4_visitor v(brw, c, prog_data, prog, shader, mem_ctx); if (!v.run()) { prog->LinkStatus = false; ralloc_strcat(&prog->InfoLog, v.fail_msg); diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index 5839a0470bd..cc2b95ff495 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -211,6 +211,7 @@ class vec4_visitor : public backend_visitor public: vec4_visitor(struct brw_context *brw, struct brw_vs_compile *c, + struct brw_vs_prog_data *prog_data, struct gl_shader_program *shader_prog, struct brw_shader *shader, void *mem_ctx); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index e4877c29eb1..3a417ad3437 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -605,12 +605,12 @@ vec4_visitor::setup_uniform_values(ir_variable *ir) int i; for (i = 0; i < uniform_vector_size[uniforms]; i++) { - c->prog_data.param[uniforms * 4 + i] = &components->f; + prog_data->param[uniforms * 4 + i] = &components->f; components++; } for (; i < 4; i++) { static float zero = 0; - c->prog_data.param[uniforms * 4 + i] = &zero; + prog_data->param[uniforms * 4 + i] = &zero; } uniforms++; @@ -639,7 +639,7 @@ vec4_visitor::setup_uniform_clipplane_values() this->userplane[compacted_clipplane_index] = dst_reg(UNIFORM, this->uniforms); this->userplane[compacted_clipplane_index].type = BRW_REGISTER_TYPE_F; for (int j = 0; j < 4; ++j) { - c->prog_data.param[this->uniforms * 4 + j] = &clip_planes[i][j]; + prog_data->param[this->uniforms * 4 + j] = &clip_planes[i][j]; } ++compacted_clipplane_index; ++this->uniforms; @@ -653,7 +653,7 @@ vec4_visitor::setup_uniform_clipplane_values() this->userplane[i] = dst_reg(UNIFORM, this->uniforms); this->userplane[i].type = BRW_REGISTER_TYPE_F; for (int j = 0; j < 4; ++j) { - c->prog_data.param[this->uniforms * 4 + j] = &clip_planes[i][j]; + prog_data->param[this->uniforms * 4 + j] = &clip_planes[i][j]; } ++this->uniforms; } @@ -689,7 +689,7 @@ vec4_visitor::setup_builtin_uniform_values(ir_variable *ir) int swiz = GET_SWZ(slots[i].swizzle, j); last_swiz = swiz; - c->prog_data.param[this->uniforms * 4 + j] = &values[swiz]; + prog_data->param[this->uniforms * 4 + j] = &values[swiz]; if (swiz <= last_swiz) this->uniform_vector_size[this->uniforms]++; } @@ -2408,7 +2408,7 @@ void vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) { if (intel->gen < 6 && - ((c->prog_data.vue_map.slots_valid & VARYING_BIT_PSIZ) || + ((prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) || c->key.userclip_active || brw->has_negative_rhw_bug)) { dst_reg header1 = dst_reg(this, glsl_type::uvec4_type); dst_reg header1_w = header1; @@ -2417,7 +2417,7 @@ vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) emit(MOV(header1, 0u)); - if (c->prog_data.vue_map.slots_valid & VARYING_BIT_PSIZ) { + if (prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) { src_reg psiz = src_reg(output_reg[VARYING_SLOT_PSIZ]); current_annotation = "Point size"; @@ -2462,7 +2462,7 @@ vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) emit(MOV(retype(reg, BRW_REGISTER_TYPE_UD), 0u)); } else { emit(MOV(retype(reg, BRW_REGISTER_TYPE_D), src_reg(0))); - if (c->prog_data.vue_map.slots_valid & VARYING_BIT_PSIZ) { + if (prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) { emit(MOV(brw_writemask(reg, WRITEMASK_W), src_reg(output_reg[VARYING_SLOT_PSIZ]))); } @@ -2493,7 +2493,7 @@ vec4_visitor::emit_clip_distances(struct brw_reg reg, int offset) * if the user wrote to it; otherwise we use gl_Position. */ gl_varying_slot clip_vertex = VARYING_SLOT_CLIP_VERTEX; - if (!(c->prog_data.vue_map.slots_valid & VARYING_BIT_CLIP_VERTEX)) { + if (!(prog_data->vue_map.slots_valid & VARYING_BIT_CLIP_VERTEX)) { clip_vertex = VARYING_SLOT_POS; } @@ -2632,8 +2632,8 @@ vec4_visitor::emit_urb_writes() /* Set up the VUE data for the first URB write */ int slot; - for (slot = 0; slot < c->prog_data.vue_map.num_slots; ++slot) { - emit_urb_slot(mrf++, c->prog_data.vue_map.slot_to_varying[slot]); + for (slot = 0; slot < prog_data->vue_map.num_slots; ++slot) { + emit_urb_slot(mrf++, prog_data->vue_map.slot_to_varying[slot]); /* If this was max_usable_mrf, we can't fit anything more into this URB * WRITE. @@ -2644,7 +2644,7 @@ vec4_visitor::emit_urb_writes() } } - bool eot = slot >= c->prog_data.vue_map.num_slots; + bool eot = slot >= prog_data->vue_map.num_slots; if (eot) { if (INTEL_DEBUG & DEBUG_SHADER_TIME) emit_shader_time_end(); @@ -2659,10 +2659,10 @@ vec4_visitor::emit_urb_writes() if (!inst->eot) { mrf = base_mrf + 1; - for (; slot < c->prog_data.vue_map.num_slots; ++slot) { + for (; slot < prog_data->vue_map.num_slots; ++slot) { assert(mrf < max_usable_mrf); - emit_urb_slot(mrf++, c->prog_data.vue_map.slot_to_varying[slot]); + emit_urb_slot(mrf++, prog_data->vue_map.slot_to_varying[slot]); } if (INTEL_DEBUG & DEBUG_SHADER_TIME) @@ -2985,6 +2985,7 @@ vec4_visitor::resolve_ud_negate(src_reg *reg) vec4_visitor::vec4_visitor(struct brw_context *brw, struct brw_vs_compile *c, + struct brw_vs_prog_data *prog_data, struct gl_shader_program *shader_prog, struct brw_shader *shader, void *mem_ctx) @@ -3005,7 +3006,7 @@ vec4_visitor::vec4_visitor(struct brw_context *brw, this->c = c; this->prog = &c->vp->program.Base; - this->prog_data = &c->prog_data; + this->prog_data = prog_data; this->variable_ht = hash_table_ctor(0, hash_table_pointer_hash, diff --git a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp index 366919379d0..bf6d03c6979 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp @@ -413,9 +413,9 @@ vec4_visitor::emit_vertex_program_code() const struct gl_program_parameter_list *params = c->vp->program.Base.Parameters; unsigned i; for (i = 0; i < params->NumParameters * 4; i++) { - c->prog_data.pull_param[i] = ¶ms->ParameterValues[i / 4][i % 4].f; + prog_data->pull_param[i] = ¶ms->ParameterValues[i / 4][i % 4].f; } - c->prog_data.nr_pull_params = i; + prog_data->nr_pull_params = i; } } @@ -442,15 +442,15 @@ vec4_visitor::setup_vp_regs() this->uniform_size[this->uniforms] = 1; /* 1 vec4 */ this->uniform_vector_size[this->uniforms] = components; for (unsigned i = 0; i < 4; i++) { - c->prog_data.param[this->uniforms * 4 + i] = i >= components ? 0 : + prog_data->param[this->uniforms * 4 + i] = i >= components ? 0 : &plist->ParameterValues[p][i].f; } this->uniforms++; /* counted in vec4 units */ } /* PROGRAM_OUTPUT */ - for (int slot = 0; slot < c->prog_data.vue_map.num_slots; slot++) { - int varying = c->prog_data.vue_map.slot_to_varying[slot]; + for (int slot = 0; slot < prog_data->vue_map.num_slots; slot++) { + int varying = prog_data->vue_map.slot_to_varying[slot]; if (varying == VARYING_SLOT_PSIZ) output_reg[varying] = dst_reg(this, glsl_type::float_type); else diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 13971ab6043..25cd3971023 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -227,6 +227,7 @@ do_vs_prog(struct brw_context *brw, GLuint program_size; const GLuint *program; struct brw_vs_compile c; + struct brw_vs_prog_data prog_data; void *mem_ctx; int i; struct gl_shader *vs = NULL; @@ -236,6 +237,7 @@ do_vs_prog(struct brw_context *brw, memset(&c, 0, sizeof(c)); memcpy(&c.key, key, sizeof(*key)); + memset(&prog_data, 0, sizeof(prog_data)); mem_ctx = ralloc_context(NULL); @@ -259,15 +261,15 @@ do_vs_prog(struct brw_context *brw, /* We also upload clip plane data as uniforms */ param_count += MAX_CLIP_PLANES * 4; - c.prog_data.param = rzalloc_array(NULL, const float *, param_count); - c.prog_data.pull_param = rzalloc_array(NULL, const float *, param_count); + prog_data.param = rzalloc_array(NULL, const float *, param_count); + prog_data.pull_param = rzalloc_array(NULL, const float *, param_count); GLbitfield64 outputs_written = vp->program.Base.OutputsWritten; - c.prog_data.inputs_read = vp->program.Base.InputsRead; + prog_data.inputs_read = vp->program.Base.InputsRead; if (c.key.copy_edgeflag) { outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE); - c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG; + prog_data.inputs_read |= VERT_BIT_EDGEFLAG; } if (intel->gen < 6) { @@ -283,7 +285,7 @@ do_vs_prog(struct brw_context *brw, } } - brw_compute_vue_map(brw, &c.prog_data.vue_map, outputs_written, + brw_compute_vue_map(brw, &prog_data.vue_map, outputs_written, c.key.userclip_active); if (0) { @@ -293,19 +295,19 @@ do_vs_prog(struct brw_context *brw, /* Emit GEN4 code. */ - program = brw_vs_emit(brw, prog, &c, mem_ctx, &program_size); + program = brw_vs_emit(brw, prog, &c, &prog_data, mem_ctx, &program_size); if (program == NULL) { ralloc_free(mem_ctx); return false; } - if (c.prog_data.nr_pull_params) - c.prog_data.num_surfaces = 1; + if (prog_data.nr_pull_params) + prog_data.num_surfaces = 1; if (c.vp->program.Base.SamplersUsed) - c.prog_data.num_surfaces = SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT); + prog_data.num_surfaces = SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT); if (prog && prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks) { - c.prog_data.num_surfaces = + prog_data.num_surfaces = SURF_INDEX_VS_UBO(prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks); } @@ -315,16 +317,16 @@ do_vs_prog(struct brw_context *brw, "Try reducing the number of live vec4 values to " "improve performance.\n"); - c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch*REG_SIZE); + prog_data.total_scratch = brw_get_scratch_size(c.last_scratch*REG_SIZE); brw_get_scratch_bo(intel, &brw->vs.scratch_bo, - c.prog_data.total_scratch * brw->max_vs_threads); + prog_data.total_scratch * brw->max_vs_threads); } brw_upload_cache(&brw->cache, BRW_VS_PROG, &c.key, sizeof(c.key), program, program_size, - &c.prog_data, sizeof(c.prog_data), + &prog_data, sizeof(prog_data), &brw->vs.prog_offset, &brw->vs.prog_data); ralloc_free(mem_ctx); diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h index caa8f7c145e..d0f98053e62 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.h +++ b/src/mesa/drivers/dri/i965/brw_vs.h @@ -105,7 +105,6 @@ struct brw_vs_prog_key { struct brw_vs_compile { struct brw_vs_prog_key key; - struct brw_vs_prog_data prog_data; struct brw_vertex_program *vp; @@ -115,6 +114,7 @@ struct brw_vs_compile { const unsigned *brw_vs_emit(struct brw_context *brw, struct gl_shader_program *prog, struct brw_vs_compile *c, + struct brw_vs_prog_data *prog_data, void *mem_ctx, unsigned *program_size); bool brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog); diff --git a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp index 45be376fed2..fb55714f73f 100644 --- a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp +++ b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp @@ -53,7 +53,7 @@ void register_coalesce_test::SetUp() shader_prog = ralloc(NULL, struct gl_shader_program); - v = new vec4_visitor(brw, c, shader_prog, NULL, NULL); + v = new vec4_visitor(brw, c, NULL, shader_prog, NULL, NULL); _mesa_init_vertex_program(ctx, &c->vp->program, GL_VERTEX_SHADER, 0); -- 2.30.2