From 09ebda1bc45f8bd87d687cb9983e0d950b9f85c6 Mon Sep 17 00:00:00 2001 From: Stephane Carrez Date: Fri, 7 Dec 2001 21:47:53 +0000 Subject: [PATCH] sparc.c (epilogue_renumber): Do not replace %fp with %sp because it can cause the delayed instruction to... * config/sparc/sparc.c (epilogue_renumber): Do not replace %fp with %sp because it can cause the delayed instruction to load below the stack. From-SVN: r47772 --- gcc/ChangeLog | 6 ++++++ gcc/config/sparc/sparc.c | 24 ++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f326c578489..9485aecaaa6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2001-12-07 Stephane Carrez + + * config/sparc/sparc.c (epilogue_renumber): Do not replace %fp + with %sp because it can cause the delayed instruction to load + below the stack. + 2001-12-07 Kaveh R. Ghazi * alpha.c (alpha_expand_unaligned_store, diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index ec3aa0e86eb..dec8b8c9389 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -5427,6 +5427,30 @@ epilogue_renumber (where, test) case CONST_DOUBLE: return 0; + /* Do not replace the frame pointer with the stack pointer because + it can cause the delayed instruction to load below the stack. + This occurs when instructions like: + + (set (reg/i:SI 24 %i0) + (mem/f:SI (plus:SI (reg/f:SI 30 %fp) + (const_int -20 [0xffffffec])) 0)) + + are in the return delayed slot. */ + case PLUS: + if (GET_CODE (XEXP (*where, 0)) == REG + && REGNO (XEXP (*where, 0)) == FRAME_POINTER_REGNUM + && (GET_CODE (XEXP (*where, 1)) != CONST_INT + || INTVAL (XEXP (*where, 1)) < SPARC_STACK_BIAS)) + return 1; + break; + + case MEM: + if (SPARC_STACK_BIAS + && GET_CODE (XEXP (*where, 0)) == REG + && REGNO (XEXP (*where, 0)) == FRAME_POINTER_REGNUM) + return 1; + break; + default: break; } -- 2.30.2