From 0a0aaa1a67dc51cb6de334353ddeba061945f37c Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 23 Jun 2020 16:47:54 +0100 Subject: [PATCH] TstL0CacheBuffer returns array of ports differently now --- src/soc/simple/core.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py index e52aac64..f19fe9f9 100644 --- a/src/soc/simple/core.py +++ b/src/soc/simple/core.py @@ -56,7 +56,7 @@ class NonProductionCore(Elaboratable): def __init__(self, addrwid=6, idepth=16): # single LD/ST funnel for memory access self.l0 = TstL0CacheBuffer(n_units=1, regwid=64, addrwid=addrwid) - pi = self.l0.l0.dports[0].pi + pi = self.l0.l0.dports[0] # function units (only one each) self.fus = AllFunctionUnits(pilist=[pi], addrwid=addrwid) -- 2.30.2