From 0ab8e2622e932593f39e5a634808567322bd669b Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 28 May 2009 10:34:08 -0700 Subject: [PATCH] i965: Support OPCODE_TRUNC in the brw_wm_fp.c code. This gets two more glean glsl1 tests using the non-GLSL path. --- src/mesa/drivers/dri/i965/brw_wm_emit.c | 17 +++++++++++++++++ src/mesa/drivers/dri/i965/brw_wm_glsl.c | 1 - src/mesa/drivers/dri/i965/brw_wm_pass1.c | 1 + 3 files changed, 18 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index 72fc21d2eba..14ab9042de7 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -353,6 +353,19 @@ static void emit_mad( struct brw_compile *p, } } +static void emit_trunc( struct brw_compile *p, + const struct brw_reg *dst, + GLuint mask, + const struct brw_reg *arg0) +{ + GLuint i; + + for (i = 0; i < 4; i++) { + if (mask & (1<Base.Instructions[i]; switch (inst->Opcode) { case OPCODE_IF: - case OPCODE_TRUNC: case OPCODE_ENDIF: case OPCODE_CAL: case OPCODE_BRK: diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c index ab9aa2f10d0..3436a247170 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c @@ -159,6 +159,7 @@ void brw_wm_pass1( struct brw_wm_compile *c ) case OPCODE_FRC: case OPCODE_MOV: case OPCODE_SWZ: + case OPCODE_TRUNC: read0 = writemask; break; -- 2.30.2