From 0ac31a92657fc2affe62e2ef0ffa49fd70231498 Mon Sep 17 00:00:00 2001
From: Gabe Black <gabe.black@gmail.com>
Date: Thu, 28 Jan 2021 22:46:26 -0800
Subject: [PATCH] arch: Stop using switching header files in ISA specific
 files.

We know what ISA we want, we don't need to use the indirection.

Change-Id: I57eb2737bb4d9abb562b857ad2c3238c641199d2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40104
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
---
 src/arch/arm/insts/tme64ruby.cc | 2 +-
 src/arch/arm/kvm/arm_cpu.cc     | 2 +-
 src/arch/mips/locked_mem.hh     | 2 +-
 src/arch/null/registers.hh      | 2 +-
 src/arch/power/decoder.hh       | 2 +-
 src/arch/riscv/locked_mem.hh    | 2 +-
 src/arch/sparc/decoder.hh       | 2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/arch/arm/insts/tme64ruby.cc b/src/arch/arm/insts/tme64ruby.cc
index f8d948197..5e22debe8 100644
--- a/src/arch/arm/insts/tme64ruby.cc
+++ b/src/arch/arm/insts/tme64ruby.cc
@@ -38,9 +38,9 @@
 #include "arch/arm/faults.hh"
 #include "arch/arm/htm.hh"
 #include "arch/arm/insts/tme64.hh"
+#include "arch/arm/locked_mem.hh"
 #include "arch/arm/registers.hh"
 #include "arch/generic/memhelpers.hh"
-#include "arch/locked_mem.hh"
 #include "debug/ArmTme.hh"
 #include "mem/packet_access.hh"
 #include "mem/request.hh"
diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc
index f674c7e58..e827c2272 100644
--- a/src/arch/arm/kvm/arm_cpu.cc
+++ b/src/arch/arm/kvm/arm_cpu.cc
@@ -44,7 +44,7 @@
 #include <memory>
 
 #include "arch/arm/interrupts.hh"
-#include "arch/registers.hh"
+#include "arch/arm/registers.hh"
 #include "cpu/kvm/base.hh"
 #include "debug/Kvm.hh"
 #include "debug/KvmContext.hh"
diff --git a/src/arch/mips/locked_mem.hh b/src/arch/mips/locked_mem.hh
index 153a991b6..73180afc2 100644
--- a/src/arch/mips/locked_mem.hh
+++ b/src/arch/mips/locked_mem.hh
@@ -47,7 +47,7 @@
  * ISA-specific helper functions for locked memory accesses.
  */
 
-#include "arch/registers.hh"
+#include "arch/mips/registers.hh"
 #include "base/logging.hh"
 #include "base/trace.hh"
 #include "cpu/base.hh"
diff --git a/src/arch/null/registers.hh b/src/arch/null/registers.hh
index db02afcf3..3e96472df 100644
--- a/src/arch/null/registers.hh
+++ b/src/arch/null/registers.hh
@@ -40,7 +40,7 @@
 
 #include "arch/generic/vec_pred_reg.hh"
 #include "arch/generic/vec_reg.hh"
-#include "arch/types.hh"
+#include "arch/null/types.hh"
 #include "base/types.hh"
 
 namespace NullISA {
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index 2951e4d31..c76ffd9a0 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -31,7 +31,7 @@
 
 #include "arch/generic/decode_cache.hh"
 #include "arch/generic/decoder.hh"
-#include "arch/types.hh"
+#include "arch/power/types.hh"
 #include "cpu/static_inst.hh"
 
 namespace PowerISA
diff --git a/src/arch/riscv/locked_mem.hh b/src/arch/riscv/locked_mem.hh
index 10d1839d8..3a9578007 100644
--- a/src/arch/riscv/locked_mem.hh
+++ b/src/arch/riscv/locked_mem.hh
@@ -49,7 +49,7 @@
 #include <stack>
 #include <unordered_map>
 
-#include "arch/registers.hh"
+#include "arch/riscv/registers.hh"
 #include "base/logging.hh"
 #include "base/trace.hh"
 #include "cpu/base.hh"
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 5b30a8218..e8267fe69 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -32,7 +32,7 @@
 #include "arch/generic/decode_cache.hh"
 #include "arch/generic/decoder.hh"
 #include "arch/sparc/registers.hh"
-#include "arch/types.hh"
+#include "arch/sparc/types.hh"
 #include "cpu/static_inst.hh"
 
 namespace SparcISA
-- 
2.30.2