From 0afb0215bdcdccba701eaa35e10f4923888e5ad1 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Fri, 3 Nov 2023 10:03:03 +0100 Subject: [PATCH] RISC-V: Lx/Sx macro insn tests Make sure these (continue to) work as intended. --- gas/testsuite/gas/riscv/l-s-macro.d | 56 +++++++++++++++++++++++++++++ gas/testsuite/gas/riscv/l-s-macro.s | 14 ++++++++ 2 files changed, 70 insertions(+) create mode 100644 gas/testsuite/gas/riscv/l-s-macro.d create mode 100644 gas/testsuite/gas/riscv/l-s-macro.s diff --git a/gas/testsuite/gas/riscv/l-s-macro.d b/gas/testsuite/gas/riscv/l-s-macro.d new file mode 100644 index 00000000000..d6e59933cd0 --- /dev/null +++ b/gas/testsuite/gas/riscv/l-s-macro.d @@ -0,0 +1,56 @@ +#as: -march=rv64i +#name: Lx/Sx macro insns +#objdump: -dwr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+ : +[ ]+[0-9a-f]+:[ ]+00000517[ ]+auipc[ ]+a0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+bval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00050503[ ]+lb[ ]+a0,0\(a0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_I[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00000517[ ]+auipc[ ]+a0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+bval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00054503[ ]+lbu[ ]+a0,0\(a0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_I[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00000517[ ]+auipc[ ]+a0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+hval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00051503[ ]+lh[ ]+a0,0\(a0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_I[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00000517[ ]+auipc[ ]+a0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+hval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00055503[ ]+lhu[ ]+a0,0\(a0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_I[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00000517[ ]+auipc[ ]+a0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+wval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00052503[ ]+lw[ ]+a0,0\(a0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_I[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00000517[ ]+auipc[ ]+a0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+wval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00056503[ ]+lwu[ ]+a0,0\(a0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_I[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00000517[ ]+auipc[ ]+a0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+dval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00053503[ ]+ld[ ]+a0,0\(a0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_I[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* + +[0-9a-f]+ : +[ ]+[0-9a-f]+:[ ]+00000297[ ]+auipc[ ]+t0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+bval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00a28023[ ]+sb[ ]+a0,0\(t0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_S[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00000297[ ]+auipc[ ]+t0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+hval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00a29023[ ]+sh[ ]+a0,0\(t0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_S[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00000297[ ]+auipc[ ]+t0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+wval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00a2a023[ ]+sw[ ]+a0,0\(t0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_S[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00000297[ ]+auipc[ ]+t0,0x0[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_HI20[ ]+dval +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* +[ ]+[0-9a-f]+:[ ]+00a2b023[ ]+sd[ ]+a0,0\(t0\) # [0-9a-f]+( <.*>)?[ ]+[0-9a-f]+:[ ]+R_RISCV_PCREL_LO12_S[ ]+.* +[ ]+[0-9a-f]+:[ ]+R_RISCV_RELAX.* diff --git a/gas/testsuite/gas/riscv/l-s-macro.s b/gas/testsuite/gas/riscv/l-s-macro.s new file mode 100644 index 00000000000..316adc4a87b --- /dev/null +++ b/gas/testsuite/gas/riscv/l-s-macro.s @@ -0,0 +1,14 @@ +L: + lb a0, bval + lbu a0, bval + lh a0, hval + lhu a0, hval + lw a0, wval + lwu a0, wval + ld a0, dval + +S: + sb a0, bval, t0 + sh a0, hval, t0 + sw a0, wval, t0 + sd a0, dval, t0 -- 2.30.2