From 0b075f19024c0555cca0d887719c7170ec2d6b1c Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Thu, 24 Nov 2022 17:24:02 +1030 Subject: [PATCH] PR16995, m68k coldfire emac immediate to macsr incorrect disassembly Mode/reg bits for these insns are 000 Dy, 001 Ay, and 111 100 for the move immediate. * m68k-opc.c (m68k_opcodes): Only accept 000 and 001 as mode for move reg to macsr/mask insns. --- opcodes/m68k-opc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c index c1165ca5cfc..2a92d8df54e 100644 --- a/opcodes/m68k-opc.c +++ b/opcodes/m68k-opc.c @@ -1641,9 +1641,9 @@ const struct m68k_opcode m68k_opcodes[] = {"movel", 6, one(0xa13c), one(0xf9ff), "#leF", mcfemac }, /* #,ACCx. */ {"movel", 2, one(0xab00), one(0xfbc0), "Rsg]", mcfemac }, /* Rx,ACCEXTx. */ {"movel", 6, one(0xab3c), one(0xfbff), "#lg]", mcfemac }, /* #,ACCEXTx. */ -{"movel", 2, one(0xa900), one(0xffc0), "RsG-", mcfemac }, /* Rx,macsr. */ +{"movel", 2, one(0xa900), one(0xfff0), "RsG-", mcfemac }, /* Rx,macsr. */ {"movel", 6, one(0xa93c), one(0xffff), "#lG-", mcfemac }, /* #,macsr. */ -{"movel", 2, one(0xad00), one(0xffc0), "RsH-", mcfemac }, /* Rx,mask. */ +{"movel", 2, one(0xad00), one(0xfff0), "RsH-", mcfemac }, /* Rx,mask. */ {"movel", 6, one(0xad3c), one(0xffff), "#lH-", mcfemac }, /* #,mask. */ {"move", 2, one(0030000), one(0170000), "*w%d", m68000up }, -- 2.30.2