From 0b1f3d739b89ea54f375ba6c069c4aabd948a255 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Tue, 22 Dec 2020 17:57:59 +0000
Subject: [PATCH]

---
 openpower/sv/vector_ops.mdwn | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/openpower/sv/vector_ops.mdwn b/openpower/sv/vector_ops.mdwn
index e9d52a745..682b3973b 100644
--- a/openpower/sv/vector_ops.mdwn
+++ b/openpower/sv/vector_ops.mdwn
@@ -27,7 +27,33 @@ Based on RVV vmiota.  vmiota may be viewed as a cumulative variant of cntlz, whe
 
 These may all be viewed as suitable for fitting into a scalar bitmanip extension.
 
-## vmsbf
+## sbfm
+
+   sbfm RT, RA, RB!=0
+
+Example
+
+     7 6 5 4 3 2 1 0   Bit index
+
+     1 0 0 1 0 1 0 0   v3 contents
+                       vmsbf.m v2, v3
+     0 0 0 0 0 0 1 1   v2 contents
+
+     1 0 0 1 0 1 0 1   v3 contents
+                       vmsbf.m v2, v3
+     0 0 0 0 0 0 0 0   v2
+
+     0 0 0 0 0 0 0 0   v3 contents
+                       vmsbf.m v2, v3
+     1 1 1 1 1 1 1 1   v2
+
+     1 1 0 0 0 0 1 1   RB vcontents
+     1 0 0 1 0 1 0 0   v3 contents
+                       vmsbf.m v2, v3, v0.t
+     0 1 x x x x 1 1   v2 contents
+
+The vmsbf.m instruction takes a mask register as input and writes results to a mask register. The instruction writes a 1 to all active mask elements before the first source element that is a 1, then writes a 0 to that element and all following active elements. If there is no set bit in the source vector, then all active elements in the destination are written with a 1.
+
 
 ## vmsif
 
-- 
2.30.2