From 0b655663ca06244d1a386d731212551833940502 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 28 Jul 2022 21:36:47 +0100 Subject: [PATCH] Revert "add fmvis as a new RM-1P-1S SVP64 RM type" This reverts commit 9fc4f5fd4ec2e3a3e52acacaf699f18d324b9f2d. --- openpower/isatables/RM-1P-1S.csv | 4 ---- openpower/isatables/minor_22.csv | 2 +- src/openpower/sv/sv_analysis.py | 10 ++-------- 3 files changed, 3 insertions(+), 13 deletions(-) delete mode 100644 openpower/isatables/RM-1P-1S.csv diff --git a/openpower/isatables/RM-1P-1S.csv b/openpower/isatables/RM-1P-1S.csv deleted file mode 100644 index e7a8cdf3..00000000 --- a/openpower/isatables/RM-1P-1S.csv +++ /dev/null @@ -1,4 +0,0 @@ -insn,mode,CONDITIONS,Ptype,Etype,0,1,2,3,in1,in2,in3,out,CR in,CR out,out2 -tdi,NORMAL,,1P,EXTRA3,0,0,0,0,RA,0,0,0,0,0,0 -twi,NORMAL,,1P,EXTRA3,0,0,0,0,RA,0,0,0,0,0,0 -fmvis,NORMAL,,1P,EXTRA3,s:FRS0,0,0,0,FRS,0,0,0,0,0,0 diff --git a/openpower/isatables/minor_22.csv b/openpower/isatables/minor_22.csv index 0913ba8a..a0207c06 100644 --- a/openpower/isatables/minor_22.csv +++ b/openpower/isatables/minor_22.csv @@ -19,5 +19,5 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry ou # Vector bitmanip 0110001110-,ALU,OP_CPROP,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,cprop,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg ------10001,ALU,OP_BMASK,RA,RB,NONE,RT,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,bmask,BM2,,1,unofficial until submitted and approved/renumbered by the opf isa wg ------00011-,ALU,OP_FMVIS,FRS,CONST_UI,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,fmvis,DX,,1,unofficial until submitted and approved/renumbered by the opf isa wg +-----00011-,ALU,OP_FMVIS,NONE,CONST_UI,NONE,FRS,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,fmvis,DX,,1,unofficial until submitted and approved/renumbered by the opf isa wg -----01011-,ALU,OP_FISHMV,FRS,CONST_UI,NONE,FRS,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,fishmv,DX,,1,unofficial until submitted and approved/renumbered by the opf isa wg diff --git a/src/openpower/sv/sv_analysis.py b/src/openpower/sv/sv_analysis.py index 6a8972c5..b0acc256 100644 --- a/src/openpower/sv/sv_analysis.py +++ b/src/openpower/sv/sv_analysis.py @@ -22,7 +22,6 @@ from collections import defaultdict from collections import OrderedDict from openpower.decoder.power_svp64 import SVP64RM from openpower.decoder.power_enums import find_wiki_file, get_csv -from openpower.util import log # Write an array of dictionaries to the CSV file name: @@ -306,7 +305,7 @@ def process_csvs(format): insn_to_csv[insn_name] = csvname_ # CSV file name by instruction dkey = create_key(row) key = tuple(dkey.values()) - #print("key=", key, dkey) + # print("key=", key) dictkeys[key] = dkey primarykeys.add(key) if key not in bykey: @@ -340,7 +339,7 @@ def process_csvs(format): '1R-1W': 'RM-2P-1S1D', '1R-1W-imm': 'RM-2P-1S1D', '1R-CRo': 'RM-2P-1S1D', - '1R-imm': 'RM-1P-1S', + '1R-imm': 'non-SV', '1W-CRo': 'RM-1P-1D', '1W': 'non-SV', '1W-CRi': 'RM-2P-1S1D', @@ -689,11 +688,6 @@ def process_csvs(format): if insn_name == 'svstep': res['0'] = 'd:RT;d:CR0' # RT,CR0: Rdest1_EXTRA2 - elif value == 'RM-1P-1S': - res['Etype'] = 'EXTRA3' # RM EXTRA3 type - if insn_name == 'fmvis': - res['0'] = 's:FRS0' # RS: Rsrc1_EXTRA2 - # add to svp64 csvs # for k in ['in1', 'in2', 'in3', 'out', 'CR in', 'CR out']: # del res[k] -- 2.30.2