From 0b7691fd6ec26dfb326e9c35cf4c5b157d3998df Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 22 Sep 2010 21:41:39 +0000 Subject: [PATCH] opcodes: blackfin: fix decoding of vector shift insn w/saturation The saturation bit was missed when decoding a vector shift insn leading to the output looking the same as the non-saturating insn. Signed-off-by: Robin Getz Signed-off-by: Mike Frysinger --- opcodes/ChangeLog | 4 ++++ opcodes/bfin-dis.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5ffc5c9f48a..3067e3cce7d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2010-09-22 Robin Getz + + * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag. + 2010-09-22 Mike Frysinger * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits. diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c index f124f1403f5..a510db1e764 100644 --- a/opcodes/bfin-dis.c +++ b/opcodes/bfin-dis.c @@ -4461,7 +4461,7 @@ decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf) OUTS (outf, dregs (src1)); OUTS (outf, " >>> "); OUTS (outf, imm5 (-immag)); - OUTS (outf, " (V)"); + OUTS (outf, " (V, S)"); } else if (sop == 2 && sopcde == 1 && bit8 == 1) { -- 2.30.2