From 0b7ca0d042438c9760e669499f37c2a292bf3250 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 3 Aug 2020 20:08:49 +0100 Subject: [PATCH] https://bugs.libre-soc.org/show_bug.cgi?id=446 Revert "LDSTSplitter: report exception" This reverts commit 16f3cca9062314475a9039c96ffa1bc97122a408. --- src/soc/experiment/pimem.py | 1 - src/soc/scoreboard/addr_split.py | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/src/soc/experiment/pimem.py b/src/soc/experiment/pimem.py index 516c9c0c..3626b2e5 100644 --- a/src/soc/experiment/pimem.py +++ b/src/soc/experiment/pimem.py @@ -105,7 +105,6 @@ class PortInterface(RecordObject): # addr is valid (TLB, L1 etc.) self.addr_ok_o = Signal(reset_less=True) self.addr_exc_o = Signal(reset_less=True) # TODO, "type" of exception - self.exc_o = Signal(reset_less) # set by LDSTSplitter # LD/ST self.ld = Data(regwid, "ld_data_o") # ok to be set by L0 Cache/Buf diff --git a/src/soc/scoreboard/addr_split.py b/src/soc/scoreboard/addr_split.py index c770c92e..aa99f63c 100644 --- a/src/soc/scoreboard/addr_split.py +++ b/src/soc/scoreboard/addr_split.py @@ -78,7 +78,7 @@ class LDSTSplitter(Elaboratable): self.ld_data_o = LDData(dwidth, "ld_data_o") #port.ld self.st_data_i = LDData(dwidth, "st_data_i") #port.st - self.exc = pi.exc_o + self.exc = Signal(reset_less=True) # pi.exc TODO # TODO : create/connect two outgoing port interfaces -- 2.30.2