From 0bc98a2404ab1722ed9c9196c45b8cce08b4f61b Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 25 May 2022 20:15:58 +0100 Subject: [PATCH] --- openpower/sv/int_fp_mv.mdwn | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index bbcc5b8e9..475fc250f 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -108,7 +108,7 @@ v3.1 Prefixed (`pfmvis` and `pfishmv`). If so it is recommended that `fmvis FRS, FI` Reinterprets `FI << 16` as a 32-bit float, which is then converted to a -64-bit float and written to `FRT`. This is equivalent to reinterpreting +64-bit float and written to `FRS`. This is equivalent to reinterpreting `FI` as a `BF16` and converting to 64-bit float. There is no need for an Rc=1 variant because this is an immediate loading instruction. @@ -186,11 +186,11 @@ Example: ``` # these two combined instructions write 0x3f808000 # into f4 as an FP32 to be converted to an FP64. -# actual contents in f4 will be 0x3f80_8000_0000_0000 +# actual contents in f4 after conversion: 0x3ff0_1000_0000_0000 # first the upper bits, happens to be +1.0 fmvis f4, 0x3F80 # writes +1.0 to f4 # now write the lower 16 bits of an FP32 -fishmv f4, 0x8000 # writes +1.0039063 to f4 +fishmv f4, 0x8000 # writes +1.00390625 to f4 ``` # Moves -- 2.30.2