From 0bff6e2d6942690d81ce1f33728de07835b0f5b7 Mon Sep 17 00:00:00 2001 From: Matthew Wahab Date: Wed, 20 Jan 2016 14:25:46 +0000 Subject: [PATCH] [AArch64] Reject invalid immediate operands to MSR UAO In the instruction to write to the ARMv8.2 PSTATE field UAO, MSR UAO, #, the immediate should be either 0 or 1 but GAS accepts any unsigned 4-bit integer. This patch implements the constraint on the immediate, generating an error if the immediate operand is invalid, and adds tests for the illegal forms. opcodes/ 2016-01-20 Matthew Wahab * aarch64-opc.c (operand_general_constraint_met_p): Check validity of MSR UAO immediate operand. gas/ 2016-01-20 Matthew Wahab * testsuite/gas/aarch64/armv8_2-a-illegal.d: New. * testsuite/gas/aarch64/armv8_2-a-illegal.l: New. * testsuite/gas/aarch64/armv8_2-a-illegal.s: New. Change-Id: Ibdec4967c00b1ef3be9dbc43d23b2c70d1a0b28c --- gas/ChangeLog | 6 ++++++ gas/testsuite/gas/aarch64/armv8_2-a-illegal.d | 3 +++ gas/testsuite/gas/aarch64/armv8_2-a-illegal.l | 9 +++++++++ gas/testsuite/gas/aarch64/armv8_2-a-illegal.s | 5 +++++ opcodes/ChangeLog | 5 +++++ opcodes/aarch64-opc.c | 6 ++++-- 6 files changed, 32 insertions(+), 2 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/armv8_2-a-illegal.d create mode 100644 gas/testsuite/gas/aarch64/armv8_2-a-illegal.l create mode 100644 gas/testsuite/gas/aarch64/armv8_2-a-illegal.s diff --git a/gas/ChangeLog b/gas/ChangeLog index 75bee536792..5a85d1f2717 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2016-01-20 Matthew Wahab + + * testsuite/gas/aarch64/armv8_2-a-illegal.d: New. + * testsuite/gas/aarch64/armv8_2-a-illegal.l: New. + * testsuite/gas/aarch64/armv8_2-a-illegal.s: New. + 2016-01-20 Mickael Guene Terry Guo diff --git a/gas/testsuite/gas/aarch64/armv8_2-a-illegal.d b/gas/testsuite/gas/aarch64/armv8_2-a-illegal.d new file mode 100644 index 00000000000..ce7f637fe49 --- /dev/null +++ b/gas/testsuite/gas/aarch64/armv8_2-a-illegal.d @@ -0,0 +1,3 @@ +#as: -march=armv8.2-a +#source: armv8_2-a-illegal.s +#error-output: armv8_2-a-illegal.l diff --git a/gas/testsuite/gas/aarch64/armv8_2-a-illegal.l b/gas/testsuite/gas/aarch64/armv8_2-a-illegal.l new file mode 100644 index 00000000000..f917bf75e4d --- /dev/null +++ b/gas/testsuite/gas/aarch64/armv8_2-a-illegal.l @@ -0,0 +1,9 @@ +[^:]+: Assembler messages: +[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#2' +[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#3' +[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#4' +[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#5' +[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#8' +[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#15' +[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#19' +[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#31' diff --git a/gas/testsuite/gas/aarch64/armv8_2-a-illegal.s b/gas/testsuite/gas/aarch64/armv8_2-a-illegal.s new file mode 100644 index 00000000000..da551ae8c1d --- /dev/null +++ b/gas/testsuite/gas/aarch64/armv8_2-a-illegal.s @@ -0,0 +1,5 @@ + + /* MSR UAO, #imm4. */ + .irp N,0, 1,2,3,4,5,8,15,19,31 + msr uao, #\N + .endr diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 8a6ea15c767..8c0648af6e2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2016-01-20 Matthew Wahab + + * aarch64-opc.c (operand_general_constraint_met_p): Check validity + of MSR UAO immediate operand. + 2016-01-18 Maciej W. Rozycki * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 1cd5c1b55df..ae06ee35fec 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -1878,9 +1878,11 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, { case AARCH64_OPND_PSTATEFIELD: assert (idx == 0 && opnds[1].type == AARCH64_OPND_UIMM4); - /* MSR PAN, #uimm4 + /* MSR UAO, #uimm4 + MSR PAN, #uimm4 The immediate must be #0 or #1. */ - if (opnd->pstatefield == 0x04 /* PAN. */ + if ((opnd->pstatefield == 0x03 /* UAO. */ + || opnd->pstatefield == 0x04) /* PAN. */ && opnds[1].imm.value > 1) { set_imm_out_of_range_error (mismatch_detail, idx, 0, 1); -- 2.30.2