From 0c28712f51f5b0748c3afd5b287969ceb615ea8d Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Wed, 12 Aug 2020 12:14:06 +0100 Subject: [PATCH] arch-arm: Fix physmem NS attribute in VMSAv8-32 descriptors The NS field in PTEs descriptors is tagging Secure/Non-secure physical memory (pages). This field is relevant in Secure state only: While in Secure state, software can access both the Secure and Non-secure physical address spaces, software in Non-secure state can only access Non-secure memory; the NS bit is hence discarded/treated as 1. This patch is aligning VMSAv8-32 with VMSAv8-64, which is tagging the pointed memory as Non-secure in case of a Non-secure lookup. The old behaviour was probably not leading to incorrect execution: once a translation completes, the security flag in the memory request is chcked against the security state of the cpu (and not only relying on the NS bit in the TLB entry) if (isSecure && !te->ns) { req->setFlags(Request::SECURE); } so we were already forbidding secure accesses from non secure world if NS = 0. It is however misleading in the debug logs to see tlb entries with NSTID = 1 and NS = 0. Change-Id: I1f964069f88c33fb14362dd4101cb22538907226 Signed-off-by: Giacomo Travaglini Reviewed-by: Nikos Nikoleris Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32638 Reviewed-by: Richard Cooper Tested-by: kokoro --- src/arch/arm/table_walker.hh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh index 9dd2c2b1e..bf81248f9 100644 --- a/src/arch/arm/table_walker.hh +++ b/src/arch/arm/table_walker.hh @@ -229,7 +229,7 @@ class TableWalker : public ClockedObject */ bool secure(bool have_security, WalkerState *currState) const { - if (have_security) { + if (have_security && currState->secureLookup) { if (type() == PageTable) return !bits(data, 3); else -- 2.30.2