From 0c56188014cd2d2e4d88db1234929d4d726a5ee7 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 26 Sep 2018 09:07:45 +0100 Subject: [PATCH] move sv remap function to sv.cc (not inline) --- riscv/riscv.mk.in | 1 + riscv/sv.cc | 7 +++++++ riscv/sv_decode.h | 2 +- 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index c52d5c0..045d58a 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -52,6 +52,7 @@ riscv_srcs = \ clint.cc \ debug_module.cc \ remote_bitbang.cc \ + sv.cc \ jtag_dtm.cc \ $(riscv_gen_srcs) \ diff --git a/riscv/sv.cc b/riscv/sv.cc index 296e2d3..ad6b0e0 100644 --- a/riscv/sv.cc +++ b/riscv/sv.cc @@ -1,4 +1,5 @@ #include "sv.h" +#include "sv_decode.h" sv_reg_csr_entry sv_csrs[SV_CSR_SZ]; sv_reg_entry sv_int_tb[NXPR]; @@ -27,3 +28,9 @@ bool sv_check_reg(bool intreg, uint64_t reg) } return false; } + +uint64_t sv_insn_t::remap(uint64_t reg) +{ + return reg; +} + diff --git a/riscv/sv_decode.h b/riscv/sv_decode.h index 14dad03..a926610 100644 --- a/riscv/sv_decode.h +++ b/riscv/sv_decode.h @@ -18,7 +18,7 @@ private: int &voffs; // remaps the register through the lookup table. // will need to take the current loop index/offset somehow - uint64_t remap(uint64_t reg) { return reg; } // TODO + uint64_t remap(uint64_t reg); }; #endif -- 2.30.2