From 0ccdce5f5fba6f5aac01e235382c96c7793efd0a Mon Sep 17 00:00:00 2001 From: Julia Koval Date: Fri, 15 Dec 2017 05:05:17 +0100 Subject: [PATCH] Enable VAES support [3/5] gcc/ * config/i386/i386-builtin.def (__builtin_ia32_vaesdeclast_v16qi, __builtin_ia32_vaesdeclast_v32qi, __builtin_ia32_vaesdeclast_v64qi): New. * config/i386/sse.md (vaesdeclast_): New pattern. * config/i386/vaesintrin.h (_mm256_aesdeclast_epi128, _mm512_aesdeclast_epi128, _mm_aesdeclast_epi128): New intrinsics. gcc/testsuite/ * gcc.target/i386/avx512f-aesdeclast-2.c: New test. * gcc.target/i386/avx512vl-aesdeclast-2.c * gcc.target/i386/avx512fvl-vaes-1.c: Handle new intrinsics. From-SVN: r255674 --- gcc/ChangeLog | 8 +++ gcc/config/i386/i386-builtin.def | 3 ++ gcc/config/i386/sse.md | 11 ++++ gcc/config/i386/vaesintrin.h | 24 +++++++++ gcc/testsuite/ChangeLog | 6 +++ .../gcc.target/i386/avx512f-aesdeclast-2.c | 52 +++++++++++++++++++ .../gcc.target/i386/avx512fvl-vaes-1.c | 7 ++- .../gcc.target/i386/avx512vl-aesdeclast-2.c | 17 ++++++ 8 files changed, 127 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-aesdeclast-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-aesdeclast-2.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9e38d7c9790..aa1d1a69bbc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2017-12-15 Julia Koval + + * config/i386/i386-builtin.def (__builtin_ia32_vaesdeclast_v16qi, + __builtin_ia32_vaesdeclast_v32qi, __builtin_ia32_vaesdeclast_v64qi): New. + * config/i386/sse.md (vaesdeclast_): New pattern. + * config/i386/vaesintrin.h (_mm256_aesdeclast_epi128, + _mm512_aesdeclast_epi128, _mm_aesdeclast_epi128): New intrinsics. + 2017-12-14 Bill Schmidt * gimple-ssa-strength-reduction.c (analyze_increments): diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index 8cfa1497213..99b13cf8ec4 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -2767,6 +2767,9 @@ BDESC (OPTION_MASK_ISA_AVX512VNNI, CODE_FOR_vpdpwssds_v4si_maskz, "__builtin_ia3 BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdec_v16qi, "__builtin_ia32_vaesdec_v16qi", IX86_BUILTIN_VAESDEC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdec_v32qi, "__builtin_ia32_vaesdec_v32qi", IX86_BUILTIN_VAESDEC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdec_v64qi, "__builtin_ia32_vaesdec_v64qi", IX86_BUILTIN_VAESDEC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) +BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdeclast_v16qi, "__builtin_ia32_vaesdeclast_v16qi", IX86_BUILTIN_VAESDECLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) +BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdeclast_v32qi, "__builtin_ia32_vaesdeclast_v32qi", IX86_BUILTIN_VAESDECLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) +BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdeclast_v64qi, "__builtin_ia32_vaesdeclast_v64qi", IX86_BUILTIN_VAESDECLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) BDESC_END (ARGS2, SPECIAL_ARGS2) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 238a6062f98..eedb3458028 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -175,6 +175,7 @@ ;; For VAES support UNSPEC_VAESDEC + UNSPEC_VAESDECLAST ]) (define_c_enum "unspecv" [ @@ -20465,3 +20466,13 @@ "TARGET_VAES" "vaesdec\t{%2, %1, %0|%0, %1, %2}" ) + +(define_insn "vaesdeclast_" + [(set (match_operand:VI1_AVX512VL_F 0 "register_operand" "=v") + (unspec:VI1_AVX512VL_F + [(match_operand:VI1_AVX512VL_F 1 "register_operand" "v") + (match_operand:VI1_AVX512VL_F 2 "vector_operand" "v")] + UNSPEC_VAESDECLAST))] + "TARGET_VAES" + "vaesdeclast\t{%2, %1, %0|%0, %1, %2}" +) diff --git a/gcc/config/i386/vaesintrin.h b/gcc/config/i386/vaesintrin.h index 0208cc7cce2..115992285c1 100644 --- a/gcc/config/i386/vaesintrin.h +++ b/gcc/config/i386/vaesintrin.h @@ -14,6 +14,14 @@ _mm256_aesdec_epi128 (__m256i __A, __m256i __B) return (__m256i)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B); } +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_aesdeclast_epi128 (__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_vaesdeclast_v32qi ((__v32qi) __A, + (__v32qi) __B); +} + #ifdef __DISABLE_VAES__ #undef __DISABLE_VAES__ #pragma GCC pop_options @@ -34,6 +42,14 @@ _mm512_aesdec_epi128 (__m512i __A, __m512i __B) return (__m512i)__builtin_ia32_vaesdec_v64qi ((__v64qi) __A, (__v64qi) __B); } +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_aesdeclast_epi128 (__m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_vaesdeclast_v64qi ((__v64qi) __A, + (__v64qi) __B); +} + #ifdef __DISABLE_VAESF__ #undef __DISABLE_VAESF__ #pragma GCC pop_options @@ -52,6 +68,14 @@ _mm_aesdec_epi128 (__m128i __A, __m128i __B) return (__m128i)__builtin_ia32_vaesdec_v16qi ((__v16qi) __A, (__v16qi) __B); } +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_aesdeclast_epi128 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vaesdeclast_v16qi ((__v16qi) __A, + (__v16qi) __B); +} + #ifdef __DISABLE_VAESVL__ #undef __DISABLE_VAESVL__ #pragma GCC pop_options diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f39da0bde03..3a2fddb2ad1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2017-12-12 Julia Koval + + * gcc.target/i386/avx512f-aesdeclast-2.c: New test. + * gcc.target/i386/avx512vl-aesdeclast-2.c + * gcc.target/i386/avx512fvl-vaes-1.c: Handle new intrinsics. + 2017-12-14 Bernd Edlinger * c-c++-common/Wcast-function-type.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/avx512f-aesdeclast-2.c b/gcc/testsuite/gcc.target/i386/avx512f-aesdeclast-2.c new file mode 100644 index 00000000000..c318eb260f4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-aesdeclast-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f -mvaes" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-require-effective-target avx512vaes } */ + +#define AVX512F + +#define VAES +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 32) + +#include "avx512f-mask-type.h" + +static void +CALC (unsigned int *r) +{ + for (int i = 0; i < SIZE; i+=4) + { + r[i] = 0xa8ba9d0; + r[i + 1] = 0x94902ace; + r[i + 2] = 0xa7726929; + r[i + 3] = 0x654dfb35; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_ud) res1, src1, src2; + MASK_TYPE mask = MASK_VALUE; + unsigned int res_ref[SIZE]; + + for (int i = 0; i < SIZE; i+=4) + { + src1.a[i] = 0x5d53475d; + src1.a[i + 1] = 0x63746f72; + src1.a[i + 2] = 0x73745665; + src1.a[i + 3] = 0x7b5b5465; + src2.a[i] = 0x726f6e5d; + src2.a[i + 1] = 0x5b477565; + src2.a[i + 2] = 0x68617929; + src2.a[i + 3] = 0x48692853; + } + + CALC (res_ref); + res1.x = INTRINSIC (_aesdeclast_epi128) (src2.x, src1.x); + + if (UNION_CHECK (AVX512F_LEN, i_ud) (res1, res_ref)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fvl-vaes-1.c b/gcc/testsuite/gcc.target/i386/avx512fvl-vaes-1.c index fc4e6bfb5ea..0ff4ce6cd7c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fvl-vaes-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512fvl-vaes-1.c @@ -1,10 +1,13 @@ /* { dg-do compile } */ /* { dg-options "-mvaes -mavx512f -mavx512vl -O2" } */ /* { dg-final { scan-assembler-times "vaesdec\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vaesdeclast\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\{\n\]*%zmm\[0-9\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaesdec\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vaesdeclast\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaesdec\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vaesdeclast\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ #include @@ -16,9 +19,11 @@ void extern avx512f_test (void) { x = _mm512_aesdec_epi128 (x, y); + x = _mm512_aesdeclast_epi128 (x, y); x256 = _mm256_aesdec_epi128 (x256, y256); + x256 = _mm256_aesdeclast_epi128 (x256, y256); x128 = _mm_aesdec_epi128 (x128, y128); - + x128 = _mm_aesdeclast_epi128 (x128, y128); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-aesdeclast-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-aesdeclast-2.c new file mode 100644 index 00000000000..b2a783a4fbe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-aesdeclast-2.c @@ -0,0 +1,17 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -mvaes" } */ +/* { dg-require-effective-target avx512vl } */ +/* { dg-require-effective-target avx512bw } */ +/* { dg-require-effective-target avx512vaes } */ + +#define AVX512VL +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-aesdeclast-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-aesdeclast-2.c" -- 2.30.2