From 0dd57f0fc03d9772beb741e55bfa0f76cb859444 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Nicolai=20H=C3=A4hnle?= Date: Mon, 13 Nov 2017 17:24:13 +0100 Subject: [PATCH] radeonsi/gfx10: disable DPBB Acked-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_pipe.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index d5906fa2233..d1a4fb2325e 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1151,6 +1151,11 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws, sscreen->dfsm_allowed = false; } + if (sscreen->info.chip_class == GFX10) { + sscreen->dpbb_allowed = false; /* TODO-GFX10: implement this */ + sscreen->dfsm_allowed = false; + } + /* While it would be nice not to have this flag, we are constrained * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9. */ -- 2.30.2