From 0dd5e98aa5c146ef21ab44b34fb7714206d5ec08 Mon Sep 17 00:00:00 2001 From: Paul Berry Date: Mon, 9 Jul 2012 12:50:31 -0700 Subject: [PATCH] i965/blorp: Loosen assertions in compute_msaa_layout_for_pipeline. Previously, on Gen7, compute_msaa_layout_for_pipeline() would verify that IMS layout is not used. However, now that we configure SURFACE_STATE correctly for IMS surfaces, IMS layout is available. Reviewed-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index c8db662e23a..c5e0ef9ca58 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp @@ -1432,20 +1432,15 @@ compute_msaa_layout_for_pipeline(struct brw_context *brw, unsigned num_samples, assert(true_layout == INTEL_MSAA_LAYOUT_NONE || true_layout == INTEL_MSAA_LAYOUT_IMS); return INTEL_MSAA_LAYOUT_NONE; + } else { + assert(true_layout != INTEL_MSAA_LAYOUT_NONE); } /* Prior to Gen7, all MSAA surfaces use IMS layout. */ if (brw->intel.gen == 6) { assert(true_layout == INTEL_MSAA_LAYOUT_IMS); - return INTEL_MSAA_LAYOUT_IMS; } - /* Since blorp uses color textures and render targets to do all its work - * (even when blitting stencil and depth data), we always have to configure - * the Gen7 GPU to use UMS or CMS layout on Gen7. - */ - assert(true_layout == INTEL_MSAA_LAYOUT_UMS || - true_layout == INTEL_MSAA_LAYOUT_CMS); return true_layout; } -- 2.30.2