From 0de328da8ffea4902c52b286d7b38d67a714c742 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Fri, 25 Jan 2019 19:25:25 +0100 Subject: [PATCH] Fixed Anlogic simulation model --- techlibs/anlogic/cells_sim.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/techlibs/anlogic/cells_sim.v b/techlibs/anlogic/cells_sim.v index 60a367928..058e76605 100644 --- a/techlibs/anlogic/cells_sim.v +++ b/techlibs/anlogic/cells_sim.v @@ -17,7 +17,7 @@ module AL_MAP_LUT1 ( ); parameter [1:0] INIT = 2'h0; parameter EQN = "(A)"; - assign Y = INIT >> A; + assign o = INIT >> a; endmodule module AL_MAP_LUT2 ( -- 2.30.2