From 0de7d4b139744b90adc1daeff645577c5762a027 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 1 Nov 2021 20:15:34 +0000 Subject: [PATCH] add ALUProxy to ReservationStations class --- src/nmutil/concurrentunit.py | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/src/nmutil/concurrentunit.py b/src/nmutil/concurrentunit.py index 6d2ff3d..9f3432a 100644 --- a/src/nmutil/concurrentunit.py +++ b/src/nmutil/concurrentunit.py @@ -93,6 +93,17 @@ class MuxOutPipe(CombMuxOutPipe): maskwid=maskwid) +class ALUProxy: + """ALUProxy: create a series of ALUs that look like the ALU being + sandwiched in between the fan-in and fan-out. One ALU looks like + it is multiple concurrent ALUs + """ + def __init__(self, alu, p, n): + self.alu = alu + self.p = p + self.n = n + + class ReservationStations(Elaboratable): """ Reservation-Station pipeline @@ -117,6 +128,14 @@ class ReservationStations(Elaboratable): self.n = self.outpipe.n # use pipe in/out as this class in/out self._ports = self.inpipe.ports() + self.outpipe.ports() + def set_alu(self, alu): + """set_alu: sets self.alu and also establishes a suite of pseudo-alus + that look to all pipeline-intents-and-purposes just like the original + """ + self.alu, self.pseudoalus = alu, [] + for i in range(num_rows): + self.pseudoalus.append(ALUProxy(alu, self.p[i], self.n[i])) + def elaborate(self, platform): m = Module() m.submodules.inpipe = self.inpipe -- 2.30.2