From 0e711e3f0ebd12820ff05633ca9a3bc2bfab5266 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 29 Jan 2021 03:27:37 +0000
Subject: [PATCH]

---
 openpower/sv/implementation.mdwn | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/openpower/sv/implementation.mdwn b/openpower/sv/implementation.mdwn
index 7b66f73cb..a6b91bb57 100644
--- a/openpower/sv/implementation.mdwn
+++ b/openpower/sv/implementation.mdwn
@@ -26,7 +26,7 @@ There are four projects:
 * TestIssuer (the HDL)
 * ISACaller (the python-based simulator)
 * power-gem5 (a cycle accurate simulator)
-* Microwatt
+* Microwatt (VHDL)
 
 Each of these needs to have SV augmentation, and the best way to
 do it is if they are all done at the same time, implementing the same
-- 
2.30.2