From 0ed8cca0082052ba11279c7df28ca231ff7fc731 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Mon, 1 Jul 2019 17:35:25 -0700 Subject: [PATCH] panfrost/midgard: Verify src_bitsize == dst_bitsize We can handle differing, but we'd prefer not to because there are restrictions on sizing which aren't accounted for yet. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/midgard/midgard_compile.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c index 8edde597cb6..353875d173f 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c +++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c @@ -690,12 +690,14 @@ emit_indirect_offset(compiler_context *ctx, nir_src *src) #define ALU_CASE(nir, _op) \ case nir_op_##nir: \ op = midgard_alu_op_##_op; \ + assert(src_bitsize == dst_bitsize); \ break; #define ALU_CASE_BCAST(nir, _op, count) \ case nir_op_##nir: \ op = midgard_alu_op_##_op; \ broadcast_swizzle = count; \ + assert(src_bitsize == dst_bitsize); \ break; static bool nir_is_fzero_constant(nir_src src) @@ -773,6 +775,9 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr) bool half_1 = false, sext_1 = false; bool half_2 = false, sext_2 = false; + unsigned src_bitsize = nir_src_bit_size(instr->src[0].src); + unsigned dst_bitsize = nir_dest_bit_size(instr->dest.dest); + switch (instr->op) { ALU_CASE(fadd, fadd); ALU_CASE(fmul, fmul); @@ -888,10 +893,6 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr) case nir_op_u2u32: { op = midgard_alu_op_imov; - unsigned src_bitsize = nir_src_bit_size(instr->src[0].src); - unsigned dst_bitsize = nir_dest_bit_size(instr->dest.dest); - - if (dst_bitsize == (src_bitsize * 2)) { /* Converting up */ half_2 = true; -- 2.30.2