From 0f50b6252bceb49547dfa05c3eba1a0e1e209d7d Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Mon, 24 Jun 2019 16:31:08 +0100 Subject: [PATCH] dev-arm: Remove un-needed Q_CONS_PROD_MASK macro Change-Id: I858d7eea088bbdd2dc12123e21e59991c896597f Signed-off-by: Giacomo Travaglini Reviewed-by: Michiel Van Tol Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19310 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg Tested-by: kokoro --- src/dev/arm/smmu_v3_cmdexec.cc | 3 +-- src/dev/arm/smmu_v3_defs.hh | 1 - src/dev/arm/smmu_v3_transl.cc | 3 +-- 3 files changed, 2 insertions(+), 5 deletions(-) diff --git a/src/dev/arm/smmu_v3_cmdexec.cc b/src/dev/arm/smmu_v3_cmdexec.cc index 494c86798..48896bf96 100644 --- a/src/dev/arm/smmu_v3_cmdexec.cc +++ b/src/dev/arm/smmu_v3_cmdexec.cc @@ -56,8 +56,7 @@ SMMUCommandExecProcess::main(Yield &yield) busy = true; while (true) { - int sizeMask = - mask(smmu.regs.cmdq_base & Q_BASE_SIZE_MASK) & Q_CONS_PROD_MASK; + int sizeMask = mask(smmu.regs.cmdq_base & Q_BASE_SIZE_MASK); if ((smmu.regs.cmdq_cons & sizeMask) == (smmu.regs.cmdq_prod & sizeMask)) diff --git a/src/dev/arm/smmu_v3_defs.hh b/src/dev/arm/smmu_v3_defs.hh index f74f8190a..2070e1d90 100644 --- a/src/dev/arm/smmu_v3_defs.hh +++ b/src/dev/arm/smmu_v3_defs.hh @@ -92,7 +92,6 @@ enum { VMT_BASE_ADDR_MASK = 0x0000ffffffffffe0ULL, VMT_BASE_SIZE_MASK = 0x000000000000001fULL, - Q_CONS_PROD_MASK = 0x00000000000fffffULL, Q_BASE_ADDR_MASK = 0x0000ffffffffffe0ULL, Q_BASE_SIZE_MASK = 0x000000000000001fULL, diff --git a/src/dev/arm/smmu_v3_transl.cc b/src/dev/arm/smmu_v3_transl.cc index f1e1fb11f..c1a7ed1d3 100644 --- a/src/dev/arm/smmu_v3_transl.cc +++ b/src/dev/arm/smmu_v3_transl.cc @@ -1280,8 +1280,7 @@ SMMUTranslationProcess::completePrefetch(Yield &yield) void SMMUTranslationProcess::sendEvent(Yield &yield, const SMMUEvent &ev) { - int sizeMask = mask(smmu.regs.eventq_base & Q_BASE_SIZE_MASK) & - Q_CONS_PROD_MASK; + int sizeMask = mask(smmu.regs.eventq_base & Q_BASE_SIZE_MASK); if (((smmu.regs.eventq_prod+1) & sizeMask) == (smmu.regs.eventq_cons & sizeMask)) -- 2.30.2