From 10532c68318b9edda58d5a3fa824079799b62555 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Tue, 17 Sep 2019 16:46:33 -0700 Subject: [PATCH] intel/fs: don't forget the stride at generate_shuffle During generate_shuffle(), when we use byte sized registers we end up with a destination stride of 2. We don't take the stride into consideration when selecting the group offset for the last MOV operation, which means we end up moving things to the wrong place, leaving the last few channels untouched. Take the destination stride in consideration so we don't miss the last channels. v2: Assert this is not necessary for the IVB special case (Jason). Reviewed-by: Jason Ekstrand Signed-off-by: Paulo Zanoni --- src/intel/compiler/brw_fs_generator.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 1fb50e0da73..6756461bc6d 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -587,12 +587,13 @@ fs_generator::generate_shuffle(fs_inst *inst, struct brw_reg gdst = suboffset(dst, group); struct brw_reg dst_d = retype(spread(gdst, 2), BRW_REGISTER_TYPE_D); + assert(dst.hstride == 1); brw_MOV(p, dst_d, retype(brw_VxH_indirect(0, 0), BRW_REGISTER_TYPE_D)); brw_MOV(p, byte_offset(dst_d, 4), retype(brw_VxH_indirect(0, 4), BRW_REGISTER_TYPE_D)); } else { - brw_MOV(p, suboffset(dst, group), + brw_MOV(p, suboffset(dst, group * dst.hstride), retype(brw_VxH_indirect(0, 0), src.type)); } } -- 2.30.2