From 106a51440d018031b94c91758eecc7424a3bb5ee Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 3 Feb 2017 03:26:13 +0000 Subject: [PATCH] radv: fix shared memory load/stores. If we have an indirect index here we need to scale it by attribute slots e.g. is this is vec2[256] then we get an indir_index in the 0.255 range but the vec2 are aligned inside vec4 slots. So scale the indir index, then extract the channels. Reviewed-by: Bas Nieuwenhuizen Cc: "17.0" Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 9be6e77f86b..566516fd8a3 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -2237,6 +2237,9 @@ static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx, LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32); LLVMValueRef derived_ptr; + if (indir_index) + indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), ""); + for (unsigned chan = 0; chan < ve; chan++) { LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false); if (indir_index) @@ -2343,6 +2346,10 @@ visit_store_var(struct nir_to_llvm_context *ctx, break; case nir_var_shared: { LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32); + + if (indir_index) + indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), ""); + for (unsigned chan = 0; chan < 8; chan++) { if (!(writemask & (1 << chan))) continue; -- 2.30.2