From 10cf0fdea36a4698fc6c189c9ca0d609c7e1f66f Mon Sep 17 00:00:00 2001
From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Tue, 23 Apr 2019 11:13:19 +0200
Subject: [PATCH] cores/cpu/vexriscv: fix wrong revert

---
 litex/soc/cores/cpu/vexriscv/verilog | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/litex/soc/cores/cpu/vexriscv/verilog b/litex/soc/cores/cpu/vexriscv/verilog
index d7bbc2c1..ebe40646 160000
--- a/litex/soc/cores/cpu/vexriscv/verilog
+++ b/litex/soc/cores/cpu/vexriscv/verilog
@@ -1 +1 @@
-Subproject commit d7bbc2c167f1a0886c446d3c305d0ed4388570be
+Subproject commit ebe4064653bc143bf92a0ccdd1099173620fcbf5
-- 
2.30.2