From 10e5c7c8a7d99cd86f388facfd90a3a2f2b0f681 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 25 Jul 2020 21:42:34 +0100 Subject: [PATCH] remove old div overflow test, keep microwatt version --- src/soc/fu/div/output_stage.py | 21 --------------------- 1 file changed, 21 deletions(-) diff --git a/src/soc/fu/div/output_stage.py b/src/soc/fu/div/output_stage.py index c20097a9..94c5c07a 100644 --- a/src/soc/fu/div/output_stage.py +++ b/src/soc/fu/div/output_stage.py @@ -71,27 +71,6 @@ class DivOutputStage(PipeModBase): comb += self.o.xer_ov.ok.eq(1) xer_ov = self.o.xer_ov.data - # see test_6_regression in div test_pipe_caller.py - # https://bugs.libre-soc.org/show_bug.cgi?id=425 - def calc_overflow(dive_abs_overflow, sign_bit_mask): - nonlocal comb - overflow = dive_abs_overflow | self.i.div_by_zero - ov = Signal(reset_less=True) - with m.If(op.is_signed): - comb += ov.eq(overflow - | (abs_quotient > sign_bit_mask) - | ((abs_quotient == sign_bit_mask) - & ~self.quotient_neg)) - with m.Else(): - comb += ov.eq(overflow) - comb += xer_ov.eq(Repl(ov, 2)) # set OV _and_ OV32 - - # check 32/64 bit version of overflow - with m.If(op.is_32bit): - calc_overflow(self.i.dive_abs_ov32, 0x80000000) - with m.Else(): - calc_overflow(self.i.dive_abs_ov64, 0x8000000000000000) - # microwatt overflow detection ov = Signal(reset_less=True) with m.If(self.i.div_by_zero): -- 2.30.2