From 1104467f3933078a019df1fb89149f5da39f7953 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 31 Jul 2019 11:22:48 +0200 Subject: [PATCH] re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in array) PR tree-optimization/91201 * config/i386/sse.md (reduc_plus_scal_v16qi): New expander. (REDUC_PLUS_MODE): Add V32QImode for TARGET_AVX and V64QImode for TARGET_AVX512F. (reduc_plus_scal_): Improve formatting by introducing a temporary. * gcc.target/i386/sse2-pr91201.c: New test. * gcc.target/i386/avx2-pr91201.c: New test. * gcc.target/i386/avx512bw-pr91201.c: New test. From-SVN: r273927 --- gcc/ChangeLog | 9 +++++++ gcc/config/i386/sse.md | 27 ++++++++++++++++--- gcc/testsuite/ChangeLog | 7 +++++ gcc/testsuite/gcc.target/i386/avx2-pr91201.c | 6 +++++ .../gcc.target/i386/avx512bw-pr91201.c | 6 +++++ gcc/testsuite/gcc.target/i386/sse2-pr91201.c | 18 +++++++++++++ 6 files changed, 70 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx2-pr91201.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512bw-pr91201.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-pr91201.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3e166c3f3af..c0b86881f4a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2019-07-31 Jakub Jelinek + + PR tree-optimization/91201 + * config/i386/sse.md (reduc_plus_scal_v16qi): New expander. + (REDUC_PLUS_MODE): Add V32QImode for TARGET_AVX and V64QImode for + TARGET_AVX512F. + (reduc_plus_scal_): Improve formatting by introducing + a temporary. + 2019-07-31 Sudakshina Das * config/aarch64/aarch64-builtins.c (enum aarch64_builtins): Add diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index fa8f13f5796..56a89154e54 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2728,9 +2728,30 @@ DONE; }) +(define_expand "reduc_plus_scal_v16qi" + [(plus:V16QI + (match_operand:QI 0 "register_operand") + (match_operand:V16QI 1 "register_operand"))] + "TARGET_SSE2" +{ + rtx tmp = gen_reg_rtx (V1TImode); + emit_insn (gen_sse2_lshrv1ti3 (tmp, gen_lowpart (V1TImode, operands[1]), + GEN_INT (64))); + rtx tmp2 = gen_reg_rtx (V16QImode); + emit_insn (gen_addv16qi3 (tmp2, operands[1], gen_lowpart (V16QImode, tmp))); + rtx tmp3 = gen_reg_rtx (V16QImode); + emit_move_insn (tmp3, CONST0_RTX (V16QImode)); + rtx tmp4 = gen_reg_rtx (V2DImode); + emit_insn (gen_sse2_psadbw (tmp4, tmp2, tmp3)); + tmp4 = gen_lowpart (V16QImode, tmp4); + emit_insn (gen_vec_extractv16qiqi (operands[0], tmp4, const0_rtx)); + DONE; +}) + (define_mode_iterator REDUC_PLUS_MODE [(V4DF "TARGET_AVX") (V8SF "TARGET_AVX") - (V8DF "TARGET_AVX512F") (V16SF "TARGET_AVX512F")]) + (V8DF "TARGET_AVX512F") (V16SF "TARGET_AVX512F") + (V32QI "TARGET_AVX") (V64QI "TARGET_AVX512F")]) (define_expand "reduc_plus_scal_" [(plus:REDUC_PLUS_MODE @@ -2741,8 +2762,8 @@ rtx tmp = gen_reg_rtx (mode); emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); rtx tmp2 = gen_reg_rtx (mode); - emit_insn (gen_add3 - (tmp2, tmp, gen_lowpart (mode, operands[1]))); + rtx tmp3 = gen_lowpart (mode, operands[1]); + emit_insn (gen_add3 (tmp2, tmp, tmp3)); emit_insn (gen_reduc_plus_scal_ (operands[0], tmp2)); DONE; }) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 632164ab330..e09f3bf4e50 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2019-07-31 Jakub Jelinek + + PR tree-optimization/91201 + * gcc.target/i386/sse2-pr91201.c: New test. + * gcc.target/i386/avx2-pr91201.c: New test. + * gcc.target/i386/avx512bw-pr91201.c: New test. + 2019-07-31 Sudakshina Das * gcc.target/aarch64/acle/tme.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/avx2-pr91201.c b/gcc/testsuite/gcc.target/i386/avx2-pr91201.c new file mode 100644 index 00000000000..4cf0a3a05c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx2-pr91201.c @@ -0,0 +1,6 @@ +/* PR tree-optimization/91201 */ +/* { dg-do compile } */ +/* { dg-options "-O3 -mavx2 -mno-avx512f" } */ +/* { dg-final { scan-assembler "\tvpsadbw\t" } } */ + +#include "sse2-pr91201.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr91201.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr91201.c new file mode 100644 index 00000000000..9829a5c5a5a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr91201.c @@ -0,0 +1,6 @@ +/* PR tree-optimization/91201 */ +/* { dg-do compile } */ +/* { dg-options "-O3 -mavx512bw -mprefer-vector-width=512" } */ +/* { dg-final { scan-assembler "\tvpsadbw\t" } } */ + +#include "sse2-pr91201.c" diff --git a/gcc/testsuite/gcc.target/i386/sse2-pr91201.c b/gcc/testsuite/gcc.target/i386/sse2-pr91201.c new file mode 100644 index 00000000000..016b187eb46 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pr91201.c @@ -0,0 +1,18 @@ +/* PR tree-optimization/91201 */ +/* { dg-do compile } */ +/* { dg-options "-O3 -msse2 -mno-sse3" } */ +/* { dg-final { scan-assembler "\tpsadbw\t" } } */ + +unsigned char bytes[1024]; + +unsigned char +sum (void) +{ + unsigned char r = 0; + unsigned char *p = (unsigned char *) bytes; + int n; + + for (n = 0; n < sizeof (bytes); ++n) + r += p[n]; + return r; +} -- 2.30.2