From 11a802bf1df0ecc2a7dc6e88233f734e7fd4ab75 Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Fri, 26 Oct 2001 17:09:33 +0000 Subject: [PATCH] * config/h8300/h8300.md (4 anonymous patterns): New. From-SVN: r46554 --- gcc/ChangeLog | 4 +++ gcc/config/h8300/h8300.md | 66 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 80981744931..23f0e1ef4fa 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2001-10-26 Kazu Hirata + + * config/h8300/h8300.md (4 anonymous patterns): New. + 2001-10-26 Kazu Hirata * config/h8300/h8300.c (get_shift_alg): Clean up. Return the diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index 8b6b39ad1d7..6d443054a0a 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -2289,3 +2289,69 @@ [(set_attr "cc" "clobber") (set_attr "length" "6") (set_attr "adjust_length" "no")]) + +;; ----------------------------------------------------------------- +;; COMBINE PATTERNS +;; ----------------------------------------------------------------- + +(define_insn "" + [(set (match_operand:HI 0 "register_operand" "=r") + (ior:HI + (zero_extend:HI (match_operand:QI 1 "register_operand" "r")) + (match_operand:HI 2 "register_operand" "0")))] + "REGNO (operands[0]) != REGNO (operands[1])" + "or\\t%X1,%s0" + [(set_attr "cc" "clobber") + (set_attr "length" "2")]) + +(define_insn "" + [(set (match_operand:SI 0 "register_operand" "=r") + (ior:SI + (zero_extend:SI (match_operand:HI 1 "register_operand" "r")) + (match_operand:SI 2 "register_operand" "0")))] + "(TARGET_H8300H || TARGET_H8300S) + && (REGNO (operands[0]) != REGNO (operands[1]))" + "or.w\\t%T1,%f0" + [(set_attr "cc" "clobber") + (set_attr "length" "2")]) + +(define_insn "" + [(set (match_operand:SI 0 "register_operand" "=r") + (ior:SI + (zero_extend:SI (match_operand:QI 1 "register_operand" "r")) + (match_operand:SI 2 "register_operand" "0")))] + "REGNO (operands[0]) != REGNO (operands[1])" + "or\\t%X1,%s0" + [(set_attr "cc" "clobber") + (set_attr "length" "2")]) + +(define_insn "" + [(set (match_operand:HI 0 "register_operand" "=r") + (xor:HI + (zero_extend:HI (match_operand:QI 1 "register_operand" "r")) + (match_operand:HI 2 "register_operand" "0")))] + "REGNO (operands[0]) != REGNO (operands[1])" + "xor\\t%X1,%s0" + [(set_attr "cc" "clobber") + (set_attr "length" "2")]) + +(define_insn "" + [(set (match_operand:SI 0 "register_operand" "=r") + (xor:SI + (zero_extend:SI (match_operand:HI 1 "register_operand" "r")) + (match_operand:SI 2 "register_operand" "0")))] + "(TARGET_H8300H || TARGET_H8300S) + && (REGNO (operands[0]) != REGNO (operands[1]))" + "xor.w\\t%T1,%f0" + [(set_attr "cc" "clobber") + (set_attr "length" "2")]) + +(define_insn "" + [(set (match_operand:SI 0 "register_operand" "=r") + (xor:SI + (zero_extend:SI (match_operand:QI 1 "register_operand" "r")) + (match_operand:SI 2 "register_operand" "0")))] + "REGNO (operands[0]) != REGNO (operands[1])" + "xor\\t%X1,%s0" + [(set_attr "cc" "clobber") + (set_attr "length" "2")]) -- 2.30.2