From 11b9cdd2d702e4de3b66ef63aa23f4319b4bc74b Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Tue, 9 Jan 2018 22:22:59 +0100 Subject: [PATCH] radv: Add mapping between dynamic state mask and external enum. The EXT values are really large, e.g. VK_DYNAMIC_STATE_DISCARD_RECTANGLE_EXT = 1000099000, so 1 << value is not going to fit into a 32-bit mask. Reviewed-by: Samuel Pitoiset Reviewed-by: Dave Airlie --- src/amd/vulkan/radv_cmd_buffer.c | 36 +++++++++++------------ src/amd/vulkan/radv_pipeline.c | 49 +++++++++++++++++++++++++------- src/amd/vulkan/radv_private.h | 32 +++++++++++++++------ 3 files changed, 79 insertions(+), 38 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index d8f780cfd76..3114ae9fb43 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -92,79 +92,79 @@ radv_bind_dynamic_state(struct radv_cmd_buffer *cmd_buffer, dest->viewport.count = src->viewport.count; dest->scissor.count = src->scissor.count; - if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) { + if (copy_mask & RADV_DYNAMIC_VIEWPORT) { if (memcmp(&dest->viewport.viewports, &src->viewport.viewports, src->viewport.count * sizeof(VkViewport))) { typed_memcpy(dest->viewport.viewports, src->viewport.viewports, src->viewport.count); - dest_mask |= 1 << VK_DYNAMIC_STATE_VIEWPORT; + dest_mask |= RADV_DYNAMIC_VIEWPORT; } } - if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) { + if (copy_mask & RADV_DYNAMIC_SCISSOR) { if (memcmp(&dest->scissor.scissors, &src->scissor.scissors, src->scissor.count * sizeof(VkRect2D))) { typed_memcpy(dest->scissor.scissors, src->scissor.scissors, src->scissor.count); - dest_mask |= 1 << VK_DYNAMIC_STATE_SCISSOR; + dest_mask |= RADV_DYNAMIC_SCISSOR; } } - if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH)) { + if (copy_mask & RADV_DYNAMIC_LINE_WIDTH) { if (dest->line_width != src->line_width) { dest->line_width = src->line_width; - dest_mask |= 1 << VK_DYNAMIC_STATE_LINE_WIDTH; + dest_mask |= RADV_DYNAMIC_LINE_WIDTH; } } - if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS)) { + if (copy_mask & RADV_DYNAMIC_DEPTH_BIAS) { if (memcmp(&dest->depth_bias, &src->depth_bias, sizeof(src->depth_bias))) { dest->depth_bias = src->depth_bias; - dest_mask |= 1 << VK_DYNAMIC_STATE_DEPTH_BIAS; + dest_mask |= RADV_DYNAMIC_DEPTH_BIAS; } } - if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS)) { + if (copy_mask & RADV_DYNAMIC_BLEND_CONSTANTS) { if (memcmp(&dest->blend_constants, &src->blend_constants, sizeof(src->blend_constants))) { typed_memcpy(dest->blend_constants, src->blend_constants, 4); - dest_mask |= 1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS; + dest_mask |= RADV_DYNAMIC_BLEND_CONSTANTS; } } - if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS)) { + if (copy_mask & RADV_DYNAMIC_DEPTH_BOUNDS) { if (memcmp(&dest->depth_bounds, &src->depth_bounds, sizeof(src->depth_bounds))) { dest->depth_bounds = src->depth_bounds; - dest_mask |= 1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS; + dest_mask |= RADV_DYNAMIC_DEPTH_BOUNDS; } } - if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK)) { + if (copy_mask & RADV_DYNAMIC_STENCIL_COMPARE_MASK) { if (memcmp(&dest->stencil_compare_mask, &src->stencil_compare_mask, sizeof(src->stencil_compare_mask))) { dest->stencil_compare_mask = src->stencil_compare_mask; - dest_mask |= 1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK; + dest_mask |= RADV_DYNAMIC_STENCIL_COMPARE_MASK; } } - if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK)) { + if (copy_mask & RADV_DYNAMIC_STENCIL_WRITE_MASK) { if (memcmp(&dest->stencil_write_mask, &src->stencil_write_mask, sizeof(src->stencil_write_mask))) { dest->stencil_write_mask = src->stencil_write_mask; - dest_mask |= 1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK; + dest_mask |= RADV_DYNAMIC_STENCIL_WRITE_MASK; } } - if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE)) { + if (copy_mask & RADV_DYNAMIC_STENCIL_REFERENCE) { if (memcmp(&dest->stencil_reference, &src->stencil_reference, sizeof(src->stencil_reference))) { dest->stencil_reference = src->stencil_reference; - dest_mask |= 1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE; + dest_mask |= RADV_DYNAMIC_STENCIL_REFERENCE; } } diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 8a80b2a6e1b..9ece79ef213 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -984,11 +984,38 @@ static unsigned si_map_swizzle(unsigned swizzle) } } + +static unsigned radv_dynamic_state_mask(VkDynamicState state) +{ + switch(state) { + case VK_DYNAMIC_STATE_VIEWPORT: + return RADV_DYNAMIC_VIEWPORT; + case VK_DYNAMIC_STATE_SCISSOR: + return RADV_DYNAMIC_SCISSOR; + case VK_DYNAMIC_STATE_LINE_WIDTH: + return RADV_DYNAMIC_LINE_WIDTH; + case VK_DYNAMIC_STATE_DEPTH_BIAS: + return RADV_DYNAMIC_DEPTH_BIAS; + case VK_DYNAMIC_STATE_BLEND_CONSTANTS: + return RADV_DYNAMIC_BLEND_CONSTANTS; + case VK_DYNAMIC_STATE_DEPTH_BOUNDS: + return RADV_DYNAMIC_DEPTH_BOUNDS; + case VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK: + return RADV_DYNAMIC_STENCIL_COMPARE_MASK; + case VK_DYNAMIC_STATE_STENCIL_WRITE_MASK: + return RADV_DYNAMIC_STENCIL_WRITE_MASK; + case VK_DYNAMIC_STATE_STENCIL_REFERENCE: + return RADV_DYNAMIC_STENCIL_REFERENCE; + default: + unreachable("Unhandled dynamic state"); + } +} + static void radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline, const VkGraphicsPipelineCreateInfo *pCreateInfo) { - uint32_t states = RADV_CMD_DIRTY_DYNAMIC_ALL; + uint32_t states = RADV_DYNAMIC_ALL; RADV_FROM_HANDLE(radv_render_pass, pass, pCreateInfo->renderPass); struct radv_subpass *subpass = &pass->subpasses[pCreateInfo->subpass]; @@ -998,7 +1025,7 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline, /* Remove all of the states that are marked as dynamic */ uint32_t count = pCreateInfo->pDynamicState->dynamicStateCount; for (uint32_t s = 0; s < count; s++) - states &= ~(1 << pCreateInfo->pDynamicState->pDynamicStates[s]); + states &= ~radv_dynamic_state_mask(pCreateInfo->pDynamicState->pDynamicStates[s]); } struct radv_dynamic_state *dynamic = &pipeline->dynamic_state; @@ -1012,26 +1039,26 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline, assert(pCreateInfo->pViewportState); dynamic->viewport.count = pCreateInfo->pViewportState->viewportCount; - if (states & (1 << VK_DYNAMIC_STATE_VIEWPORT)) { + if (states & RADV_DYNAMIC_VIEWPORT) { typed_memcpy(dynamic->viewport.viewports, pCreateInfo->pViewportState->pViewports, pCreateInfo->pViewportState->viewportCount); } dynamic->scissor.count = pCreateInfo->pViewportState->scissorCount; - if (states & (1 << VK_DYNAMIC_STATE_SCISSOR)) { + if (states & RADV_DYNAMIC_SCISSOR) { typed_memcpy(dynamic->scissor.scissors, pCreateInfo->pViewportState->pScissors, pCreateInfo->pViewportState->scissorCount); } } - if (states & (1 << VK_DYNAMIC_STATE_LINE_WIDTH)) { + if (states & RADV_DYNAMIC_LINE_WIDTH) { assert(pCreateInfo->pRasterizationState); dynamic->line_width = pCreateInfo->pRasterizationState->lineWidth; } - if (states & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS)) { + if (states & RADV_DYNAMIC_DEPTH_BIAS) { assert(pCreateInfo->pRasterizationState); dynamic->depth_bias.bias = pCreateInfo->pRasterizationState->depthBiasConstantFactor; @@ -1055,7 +1082,7 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline, } } - if (uses_color_att && states & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS)) { + if (uses_color_att && states & RADV_DYNAMIC_BLEND_CONSTANTS) { assert(pCreateInfo->pColorBlendState); typed_memcpy(dynamic->blend_constants, pCreateInfo->pColorBlendState->blendConstants, 4); @@ -1077,28 +1104,28 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline, subpass->depth_stencil_attachment.attachment != VK_ATTACHMENT_UNUSED) { assert(pCreateInfo->pDepthStencilState); - if (states & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS)) { + if (states & RADV_DYNAMIC_DEPTH_BOUNDS) { dynamic->depth_bounds.min = pCreateInfo->pDepthStencilState->minDepthBounds; dynamic->depth_bounds.max = pCreateInfo->pDepthStencilState->maxDepthBounds; } - if (states & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK)) { + if (states & RADV_DYNAMIC_STENCIL_COMPARE_MASK) { dynamic->stencil_compare_mask.front = pCreateInfo->pDepthStencilState->front.compareMask; dynamic->stencil_compare_mask.back = pCreateInfo->pDepthStencilState->back.compareMask; } - if (states & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK)) { + if (states & RADV_DYNAMIC_STENCIL_WRITE_MASK) { dynamic->stencil_write_mask.front = pCreateInfo->pDepthStencilState->front.writeMask; dynamic->stencil_write_mask.back = pCreateInfo->pDepthStencilState->back.writeMask; } - if (states & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE)) { + if (states & RADV_DYNAMIC_STENCIL_REFERENCE) { dynamic->stencil_reference.front = pCreateInfo->pDepthStencilState->front.reference; dynamic->stencil_reference.back = diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 2d7d9591872..b7c53d03fbd 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -729,17 +729,31 @@ struct radv_buffer { bool shareable; }; +enum radv_dynamic_state_bits { + RADV_DYNAMIC_VIEWPORT = 1 << 0, + RADV_DYNAMIC_SCISSOR = 1 << 1, + RADV_DYNAMIC_LINE_WIDTH = 1 << 2, + RADV_DYNAMIC_DEPTH_BIAS = 1 << 3, + RADV_DYNAMIC_BLEND_CONSTANTS = 1 << 4, + RADV_DYNAMIC_DEPTH_BOUNDS = 1 << 5, + RADV_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, + RADV_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, + RADV_DYNAMIC_STENCIL_REFERENCE = 1 << 8, + RADV_DYNAMIC_ALL = (1 << 9) - 1, +}; enum radv_cmd_dirty_bits { - RADV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */ - RADV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */ - RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */ - RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */ - RADV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */ - RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */ - RADV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */ - RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */ - RADV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */ + /* Keep the dynamic state dirty bits in sync with + * enum radv_dynamic_state_bits */ + RADV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, + RADV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, + RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, + RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, + RADV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, + RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, + RADV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, + RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, + RADV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, RADV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1, RADV_CMD_DIRTY_PIPELINE = 1 << 9, RADV_CMD_DIRTY_INDEX_BUFFER = 1 << 10, -- 2.30.2