From 11d7bd360e26352aec26a12350b86bc9a3d5ec53 Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Tue, 4 Jun 2019 18:30:47 +0200 Subject: [PATCH] rs6000: Delete VS_64reg now always is "wa". Make that simplification. * config/rs6000/vsx.md (define_mode_attr VS_64reg): Delete. (*vsx_extract___load): Adjust. (vsx_splat__reg): Adjust. From-SVN: r271917 --- gcc/ChangeLog | 6 ++++++ gcc/config/rs6000/vsx.md | 9 ++------- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index aad38859726..b9f1cb30198 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-06-04 Segher Boessenkool + + * config/rs6000/vsx.md (define_mode_attr VS_64reg): Delete. + (*vsx_extract___load): Adjust. + (vsx_splat__reg): Adjust. + 2019-06-04 Segher Boessenkool * config/rs6000/constraints.md (define_register_constraint "ws"): diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 57f99632547..60b3a8de899 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -275,11 +275,6 @@ (V2DF "V4DF") (V1TI "V2TI")]) -;; Map register class for 64-bit element in 128-bit vector for normal register -;; to register moves -(define_mode_attr VS_64reg [(V2DF "wa") - (V2DI "wa")]) - ;; Iterators for loading constants with xxspltib (define_mode_iterator VSINT_84 [V4SI V2DI DI SI]) (define_mode_iterator VSINT_842 [V8HI V4SI V2DI]) @@ -3252,7 +3247,7 @@ ;; Optimize extracting a single scalar element from memory. (define_insn_and_split "*vsx_extract___load" - [(set (match_operand: 0 "register_operand" "=,wr") + [(set (match_operand: 0 "register_operand" "=wa,wr") (vec_select: (match_operand:VSX_D 1 "memory_operand" "m,m") (parallel [(match_operand:QI 2 "const_0_to_1_operand" "n,n")]))) @@ -4118,7 +4113,7 @@ (define_insn "vsx_splat__reg" [(set (match_operand:VSX_D 0 "vsx_register_operand" "=,we") (vec_duplicate:VSX_D - (match_operand: 1 "gpc_reg_operand" ",b")))] + (match_operand: 1 "gpc_reg_operand" "wa,b")))] "VECTOR_MEM_VSX_P (mode)" "@ xxpermdi %x0,%x1,%x1,0 -- 2.30.2