From 11e4b249cd00d0c3a40817427c2f689756d5e952 Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Sat, 24 Sep 2022 17:06:44 +0300 Subject: [PATCH] pysvp64asm: fix comment layout --- src/openpower/sv/trans/svp64.py | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py index 596514cd..71b86975 100644 --- a/src/openpower/sv/trans/svp64.py +++ b/src/openpower/sv/trans/svp64.py @@ -1263,13 +1263,13 @@ class SVP64Asm: # for LD/ST-indexed (RA+RB): """ - | 0-1 | 2 | 3 4 | description | - | --- | --- |---------|-------------------------- | - | 00 | SEA | dz sz | normal mode | - | 01 | SEA | dz sz | Strided (scalar only source) | - | 10 | N | dz sz | sat mode: N=0/1 u/s | - | 11 | inv | CR-bit | Rc=1: pred-result CR sel | - | 11 | inv | dz RC1 | Rc=0: pred-result z/nonz | + | 0-1 | 2 | 3 4 | description | + | --- | --- |---------|----------------------------- | + | 00 | SEA | dz sz | normal mode | + | 01 | SEA | dz sz | strided (scalar only source) | + | 10 | N | dz sz | sat mode: N=0/1 u/s | + | 11 | inv | CR-bit | Rc=1: pred-result CR sel | + | 11 | inv | dz RC1 | Rc=0: pred-result z/nonz | """ # and leaving out branches and cr_ops for now because they're -- 2.30.2