From 1214dfe6b94026030b0a945bca23e86db9861ac8 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 6 Jul 2020 20:19:48 +0100 Subject: [PATCH] improve debug for test_sim.py --- src/soc/simulator/test_sim.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/soc/simulator/test_sim.py b/src/soc/simulator/test_sim.py index f6a52fc9..e6b09667 100644 --- a/src/soc/simulator/test_sim.py +++ b/src/soc/simulator/test_sim.py @@ -294,7 +294,8 @@ class DecoderBase: for reg in regs: qemu_val = qemu.get_register(reg) sim_val = sim.gpr(reg).value - self.assertEqual(qemu_val, sim_val) + self.assertEqual(qemu_val, sim_val, + "expect %x got %x" % (qemu_val, sim_val)) class DecoderTestCase(DecoderBase, GeneralTestCases): -- 2.30.2