From 1247928f00314e8a76093323f4a42757ab03d2d3 Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 29 Apr 2022 12:26:45 +0100 Subject: [PATCH] --- openpower/sv/biginteger/analysis.mdwn | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/openpower/sv/biginteger/analysis.mdwn b/openpower/sv/biginteger/analysis.mdwn index 4cd820b53..960b50126 100644 --- a/openpower/sv/biginteger/analysis.mdwn +++ b/openpower/sv/biginteger/analysis.mdwn @@ -458,9 +458,24 @@ Look closely at Algorithm D when the divisor is only a scalar Here, just as with `madded` which can put the hi-half of the 128 bit product back in as a form of 64-bit carry, a scalar divisor of a vector dividend puts the modulo back in as the hi-half of a 128/64-bit divide. + RT0 = (( 0<<64) | RA0) / RB0 + RC0 = (( 0<<64) | RA0) % RB0 + | + +-------+ + | + RT1 = ((RC0<<64) | RA1) / RB1 + RC1 = ((RC0<<64) | RA1) % RB1 + | + +-------+ + | + RT2 = ((RC1<<64) | RA2) / RB2 + RC2 = ((RC1<<64) | RA2) % RB2 + By a nice coincidence this is exactly the same 128/64-bit operation needed for the `qhat` estimate if it may produce both the quotient and the remainder. +The pseudocode cleanly covering both scenarios (leaving out +overflow for clarity) can be written as: `divrem2du RT,RA,RB,RC` -- 2.30.2