From 128ddc019ac826996d7d279059d3563baca06cbc Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 27 May 2021 13:59:36 +0000 Subject: [PATCH] set other nets to input in fake 4k SRAM cell --- experiments9/LibreSOCMem.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/experiments9/LibreSOCMem.py b/experiments9/LibreSOCMem.py index 3bb757d..8489df4 100644 --- a/experiments9/LibreSOCMem.py +++ b/experiments9/LibreSOCMem.py @@ -251,9 +251,11 @@ def _load(): net.setExternal(True) NetExternalComponents.setExternal(pin) # q is an output, has to be explicitly set as output - # everything else can kinda get away with not being set + # everything else set to input if name == 'q': net.setDirection( Net.Direction.OUT ) + else: + net.setDirection( Net.Direction.IN ) # separate the pin groups x += step * 3 -- 2.30.2