From 12dfde262d3b087648e49740f834db5af4ccb35e Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 2 Oct 2022 14:56:18 +0100 Subject: [PATCH] --- openpower/sv/biginteger.mdwn | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/openpower/sv/biginteger.mdwn b/openpower/sv/biginteger.mdwn index 522ee6f5a..a51e4c387 100644 --- a/openpower/sv/biginteger.mdwn +++ b/openpower/sv/biginteger.mdwn @@ -27,8 +27,9 @@ Dynamic SIMD ALUs for maximum performance and effectiveness. Covered in [[biginteger/analysis]] the summary is that standard `adde` is sufficient for SVP64 Vectorisation of big-integer addition (and subfe -for subtraction) but that big-integer multiply and divide require an -extra 3-in 2-out instruction, similar to Intel's `mulx`, to be efficient. +for subtraction) but that big-integer shift, multiply and divide require an +extra 3-in 2-out instructions, similar to Intel's `mulx` and +`idiv`, to be efficient. The same instruction (`maddedu`) is used for both because 'maddedu''s primary purpose is to perform a fused 64-bit scalar multiply with a large vector, where that result is Big-Added for Big-Multiply, but Big-Subtracted for -- 2.30.2