From 12ffa10c1d38b3700e6db4140fcfa8ac76b6c6e8 Mon Sep 17 00:00:00 2001 From: Stan Shebs Date: Fri, 20 Sep 1996 23:20:58 +0000 Subject: [PATCH] * config/sh/tm-sh.h (REGISTER_NAMES): Move fp registers to be consistent with GCC. (FPUL_REGNUM, etc): Renumber to match list changes. (ADDR_BITS_REMOVE): Delete. * sh-tdep.c (sh_reg_names, sh3_reg_names, sh3e_reg_names): Rearrange to match REGISTER_NAMES. * sh3-rom.c (sh3_regnames, sh3e_regnames): Ditto. PR 9457 --- gdb/ChangeLog | 10 ++++++++ gdb/config/sh/tm-sh.h | 54 +++++++++++++++++++++---------------------- gdb/sh-tdep.c | 50 ++++++++++++++++++++------------------- gdb/sh3-rom.c | 24 +++++++++---------- 4 files changed, 74 insertions(+), 64 deletions(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index ff5e8782cbb..2c4da4f2f6f 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,13 @@ +Fri Sep 20 16:10:58 1996 Stan Shebs + + * config/sh/tm-sh.h (REGISTER_NAMES): Move fp registers to + be consistent with GCC. + (FPUL_REGNUM, etc): Renumber to match list changes. + (ADDR_BITS_REMOVE): Delete. + * sh-tdep.c (sh_reg_names, sh3_reg_names, sh3e_reg_names): + Rearrange to match REGISTER_NAMES. + * sh3-rom.c (sh3_regnames, sh3e_regnames): Ditto. + start-sanitize-d10v Thu Sep 19 16:19:01 1996 Martin M. Hunt diff --git a/gdb/config/sh/tm-sh.h b/gdb/config/sh/tm-sh.h index d2d329a0ddb..93923f9978b 100644 --- a/gdb/config/sh/tm-sh.h +++ b/gdb/config/sh/tm-sh.h @@ -109,25 +109,25 @@ extern CORE_ADDR sh_skip_prologue (); Entries beyond the first NUM_REGS are ignored. */ #define REGISTER_NAMES \ - {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ - "r8", "r9", "r10","r11","r12", "r13", "r14","r15",\ - "pc", "pr", "gbr","vbr","mach","macl","sr", \ - "ssr", "spc", \ - "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", \ - "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", \ - "fpul","fpscr", \ - "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \ - "fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15"\ + { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", \ + "fpul", "fpscr", \ + "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \ + "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15" \ + "ssr", "spc", \ + "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", \ + "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", \ } #define NUM_REGS 59 -/* Register numbers of various important registers. - Note that some of these values are "real" register numbers, - and correspond to the general registers of the machine, - and some are "phony" register numbers which are too large - to be actual register numbers as far as the user is concerned - but do serve to get the desired values when passed to read_register. */ +/* Register numbers of various important registers. Note that some of + these values are "real" register numbers, and correspond to the + general registers of the machine, and some are "phony" register + numbers which are too large to be actual register numbers as far as + the user is concerned but do serve to get the desired values when + passed to read_register. */ #define R0_REGNUM 0 #define FP_REGNUM 14 @@ -139,12 +139,15 @@ extern CORE_ADDR sh_skip_prologue (); #define MACH_REGNUM 20 #define MACL_REGNUM 21 #define SR_REGNUM 22 -#define NUM_REALREGS 23 -#define FPUL_REGNUM 41 -#define FP0_REGNUM 43 -#define FP15_REGNUM 58 -#undef NUM_REALREGS -#define NUM_REALREGS 59 +#define FPUL_REGNUM 23 +#define FP0_REGNUM 25 +#define FP15_REGNUM 40 +#define SSR_REGNUM 41 +#define SPC_REGNUM 42 +#define R0B0_REGNUM 43 +#define R0B1_REGNUM 51 + +#define NUM_REALREGS 59 /* Store the address of the place in which to copy the structure the subroutine will return. This is called from call_function. @@ -161,7 +164,6 @@ extern CORE_ADDR sh_skip_prologue (); #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ memcpy (VALBUF, (char *)(REGBUF), TYPE_LENGTH(TYPE)) - /* Write into appropriate registers a function return value of type TYPE, given in virtual format. @@ -170,7 +172,6 @@ extern CORE_ADDR sh_skip_prologue (); #define STORE_RETURN_VALUE(TYPE,VALBUF) \ write_register_bytes (REGISTER_BYTE(4), VALBUF, TYPE_LENGTH (TYPE)) - /* Extract from an array REGBUF containing the (raw) register state the address in which a function should return its structure value, as a CORE_ADDR (or an expression that can be used as one). */ @@ -226,16 +227,13 @@ extern CORE_ADDR sh_skip_prologue (); typedef unsigned short INSN_WORD; -#define ADDR_BITS_REMOVE(addr) ((addr)) - #define CALL_DUMMY_LENGTH 10 -/* Discard from the stack the innermost frame, - restoring all saved registers. */ +/* Discard from the stack the innermost frame, restoring all saved + registers. */ #define POP_FRAME pop_frame(); - #define NOP {0x20, 0x0b} #define REGISTER_SIZE 4 diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c index 7a405d29057..faeb60df507 100644 --- a/gdb/sh-tdep.c +++ b/gdb/sh-tdep.c @@ -50,39 +50,39 @@ char *tmp_sh_processor_type; char *sh_generic_reg_names[] = REGISTER_NAMES; char *sh_reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "pc", "pr", "gbr", "vbr", "mach","macl", "sr", - "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "","", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "" + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", + "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", }; char *sh3_reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "pc", "pr", "gbr", "vbr", "mach","macl","sr", - "ssr", "spc", + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", + "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "ssr", "spc", "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", - "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", - "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "" + "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1" }; char *sh3e_reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "pc", "pr", "gbr", "vbr", "mach","macl","sr", - "ssr", "spc", + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", + "fpul", "fpscr", + "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", + "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", + "ssr", "spc", "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", - "fpul", "fpscr", - "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", - "fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15" }; struct { @@ -361,6 +361,8 @@ sh_set_processor_type_command (args, from_tty) } } +/* This is a dummy not actually run. */ + static void sh_show_processor_type_command (args, from_tty) char *args; diff --git a/gdb/sh3-rom.c b/gdb/sh3-rom.c index 6279c9a96df..7b2718a1b71 100644 --- a/gdb/sh3-rom.c +++ b/gdb/sh3-rom.c @@ -70,14 +70,12 @@ sh3_supply_register (regname, regnamelen, val, vallen) else regno = GBR_REGNUM; break; -#if 0 case 'S': if (regname[1] == 'S' && regname[2] == 'R') regno = SSR_REGNUM; else if (regname[1] == 'P' && regname[2] == 'C') regno = SPC_REGNUM; break; -#endif } } else if (regnamelen == 4) @@ -108,7 +106,10 @@ sh3_supply_register (regname, regnamelen, val, vallen) numregs = 8; } } - + else if (regnamelen == 17) + { + } + if (regno >= 0) while (numregs-- > 0) val = monitor_supply_register (regno++, val); @@ -146,33 +147,32 @@ sh3_load (desc, file, hashmark) than does GDB, and don't necessarily support all the registers either. So, typing "info reg sp" becomes a "r30". */ - static char *sh3_regnames[NUM_REGS] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11","R12", "R13", "R14", "R15", "PC", "PR", "GBR", "VBR","MACH","MACL", "SR", + NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, "SSR", "SPC", "R0_BANK0", "R1_BANK0", "R2_BANK0", "R3_BANK0", "R4_BANK0", "R5_BANK0", "R6_BANK0", "R7_BANK0", "R0_BANK1", "R1_BANK1", "R2_BANK1", "R3_BANK1", - "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1", - NULL, NULL, - NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL + "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1" }; static char *sh3e_regnames[NUM_REGS] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11","R12", "R13", "R14", "R15", "PC", "PR", "GBR", "VBR","MACH","MACL", "SR", + "FPUL", "FPSCR", + "FR0", "FR1", "FR2", "FR3", "FR4", "FR5", "FR6", "FR7", + "FR8", "FR9", "FR10", "FR11", "FR12", "FR13", "FR14", "FR15", "SSR","SPC", "R0_BANK0", "R1_BANK0", "R2_BANK0", "R3_BANK0", "R4_BANK0", "R5_BANK0", "R6_BANK0", "R7_BANK0", "R0_BANK1", "R1_BANK1", "R2_BANK1", "R3_BANK1", - "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1", - "FPUL", "FPSCR", - "FR0", "FR1", "FR2", "FR3", "FR4", "FR5", "FR6", "FR7", - "FR8", "FR9", "FR10", "FR11", "FR12", "FR13", "FR14", "FR15" + "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1" }; /* Define the monitor command strings. Since these are passed directly -- 2.30.2