From 135f00e666fdc505d8b3f68cd673cde736ea35ee Mon Sep 17 00:00:00 2001 From: Topi Pohjolainen Date: Fri, 6 Mar 2015 14:21:25 +0200 Subject: [PATCH] i965/blorp/gen6: Prepare vertex buffer setup logic for gen8 Signed-off-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 +++++++++++++++++------- 1 file changed, 22 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index f3ce42c7c9d..d635962e7b3 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -95,19 +95,33 @@ gen6_blorp_emit_vertex_buffer_state(struct brw_context *brw, if (brw->gen >= 7) dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE; - if (brw->gen == 7) + switch (brw->gen) { + case 7: dw0 |= GEN7_MOCS_L3 << 16; + break; + case 8: + dw0 |= BDW_MOCS_WB << 16; + break; + case 9: + dw0 |= SKL_MOCS_WB << 16; + break; + } BEGIN_BATCH(batch_length); OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (batch_length - 2)); OUT_BATCH(dw0); - /* start address */ - OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, - vertex_offset); - /* end address */ - OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, - vertex_offset + vbo_size - 1); - OUT_BATCH(0); + if (brw->gen >= 8) { + OUT_RELOC64(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, vertex_offset); + OUT_BATCH(vbo_size); + } else { + /* start address */ + OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, + vertex_offset); + /* end address */ + OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, + vertex_offset + vbo_size - 1); + OUT_BATCH(0); + } ADVANCE_BATCH(); } -- 2.30.2