From 1362ae874b03f8080bcbdbdfef29b97ffd966156 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 18 Apr 2021 23:42:48 +0100 Subject: [PATCH] give spblock512 a name as a submodule --- src/soc/bus/SPBlock512W64B8W.py | 6 +++--- src/soc/litex/florent | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/soc/bus/SPBlock512W64B8W.py b/src/soc/bus/SPBlock512W64B8W.py index 02836a40..d00aa532 100644 --- a/src/soc/bus/SPBlock512W64B8W.py +++ b/src/soc/bus/SPBlock512W64B8W.py @@ -44,9 +44,9 @@ class SPBlock512W64B8W(Elaboratable): # create Chips4Makers 4k SRAM cell here, mark it as "black box" # for coriolis2 to pick up - sram = Instance("spblock_512w64b8w", i_a=a, o_q=q, i_d=d, - i_we=we, i_clk=ClockSignal()) - m.submodules += sram + sram = Instance("spblock512w64b8w", i_a=a, o_q=q, i_d=d, + i_we=we, i_clk=ClockSignal()) + m.submodules.spb = sram # has to be added to the actual module rather than the instance # sram.attrs['blackbox'] = 1 diff --git a/src/soc/litex/florent b/src/soc/litex/florent index f1eb3ba9..7771c7d9 160000 --- a/src/soc/litex/florent +++ b/src/soc/litex/florent @@ -1 +1 @@ -Subproject commit f1eb3ba9e89bdb1748e6655cbe8342f4e0704cae +Subproject commit 7771c7d9180d369299fc754e640733e309d9adf6 -- 2.30.2