From 13b93d4b899bd7390429113d2ac98ec057a8c3d2 Mon Sep 17 00:00:00 2001 From: Olga Makhotina Date: Mon, 5 Mar 2018 14:37:54 +0000 Subject: [PATCH] Enable WBOINVD and PCONFIG instructions. 2018-03-05 Olga Makhotina Enable WBOINVD and PCONFIG instructions. gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_PCONFIG_SET, OPTION_MASK_ISA_PCONFIG_UNSET, OPTION_MASK_ISA_WBNOINVD_SET, OPTION_MASK_ISA_WBNOINVD_UNSET): New definitions. (ix86_handle_option): Handle -mpconfig and -mwbnoinvd. * config.gcc (pconfigintrin.h, wbnoinvdintrin.h) : Add headers. * config/i386/cpuid.h (bit_PCONFIG, bit_WBNOINVD): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect -mpconfig and -mwbnoinvd. * config/i386/i386-builtin.def (__builtin_ia32_wbnoinvd, __builtin_ia32_wbinvd): New builtins. (SPECIAL_ARGS2): New. * config/i386/i386-c.c (__WBNOINVD__, __PCONFIG__): New. (SPECIAL_ARGS2): New. * config/i386/i386.c (ix86_target_string): Add -mpconfig and -mwbnoinvd. (ix86_valid_target_attribute_inner_p): Ditto. (ix86_init_mmx_sse_builtins): Add special_args2. * config/i386/i386.h (TARGET_PCONFIG, TARGET_PCONFIG_P, TARGET_WBNOINVD, TARGET_WBNOINVD_P): New. * config/i386/i386.md (UNSPECV_WBINVD, UNSPECV_WBNOINVD): New. (define_insn "wbinvd", define_insn "wbnoinvd"): New. * config/i386/i386.opt: Add -mpconfig and -mwbnoinvd. * config/i386/immintrin.h (_wbinvd): New intrinsic. * config/i386/pconfigintrin.h: New file. * config/i386/wbnoinvdintrin.h: Ditto. * config/i386/x86intrin.h: Add headers pconfigintrin.h and wbnoinvdintrin.h. * doc/invoke.texi (-mpconfig, -mwbnoinvd): New. gcc/testsuite/ * g++.dg/other/i386-2.C: Add -mpconfig and -mwbnoinvd. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-23.c: Add pconfig and wbnoinvd. * gcc.target/i386/wbinvd-1.c: New test. * gcc.target/i386/wbnoinvd-1.c: Ditto. * gcc.target/i386/pconfig-1.c: Ditto. From-SVN: r258247 --- gcc/ChangeLog | 29 ++++++++++++ gcc/common/config/i386/i386-common.c | 30 ++++++++++++ gcc/config.gcc | 6 ++- gcc/config/i386/cpuid.h | 3 +- gcc/config/i386/driver-i386.c | 6 +++ gcc/config/i386/i386-builtin.def | 10 +++- gcc/config/i386/i386-c.c | 4 ++ gcc/config/i386/i386.c | 32 ++++++++++++- gcc/config/i386/i386.h | 4 ++ gcc/config/i386/i386.md | 16 +++++++ gcc/config/i386/i386.opt | 8 ++++ gcc/config/i386/immintrin.h | 7 +++ gcc/config/i386/pconfigintrin.h | 55 ++++++++++++++++++++++ gcc/config/i386/wbnoinvdintrin.h | 26 ++++++++++ gcc/config/i386/x86intrin.h | 4 ++ gcc/doc/invoke.texi | 8 +++- gcc/testsuite/ChangeLog | 12 +++++ gcc/testsuite/g++.dg/other/i386-2.C | 2 +- gcc/testsuite/g++.dg/other/i386-3.C | 2 +- gcc/testsuite/gcc.target/i386/pconfig-1.c | 20 ++++++++ gcc/testsuite/gcc.target/i386/sse-12.c | 2 +- gcc/testsuite/gcc.target/i386/sse-13.c | 2 +- gcc/testsuite/gcc.target/i386/sse-14.c | 2 +- gcc/testsuite/gcc.target/i386/sse-23.c | 2 +- gcc/testsuite/gcc.target/i386/wbinvd-1.c | 11 +++++ gcc/testsuite/gcc.target/i386/wbnoinvd-1.c | 10 ++++ 26 files changed, 301 insertions(+), 12 deletions(-) create mode 100644 gcc/config/i386/pconfigintrin.h create mode 100644 gcc/config/i386/wbnoinvdintrin.h create mode 100644 gcc/testsuite/gcc.target/i386/pconfig-1.c create mode 100644 gcc/testsuite/gcc.target/i386/wbinvd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/wbnoinvd-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6129f96009b..28e31de036f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,32 @@ +2018-03-05 Olga Makhotina + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_PCONFIG_SET, + OPTION_MASK_ISA_PCONFIG_UNSET, OPTION_MASK_ISA_WBNOINVD_SET, + OPTION_MASK_ISA_WBNOINVD_UNSET): New definitions. + (ix86_handle_option): Handle -mpconfig and -mwbnoinvd. + * config.gcc (pconfigintrin.h, wbnoinvdintrin.h) : Add headers. + * config/i386/cpuid.h (bit_PCONFIG, bit_WBNOINVD): New. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect -mpconfig + and -mwbnoinvd. + * config/i386/i386-builtin.def (__builtin_ia32_wbnoinvd, + __builtin_ia32_wbinvd): New builtins. + (SPECIAL_ARGS2): New. + * config/i386/i386-c.c (__WBNOINVD__, __PCONFIG__): New. + (SPECIAL_ARGS2): New. + * config/i386/i386.c (ix86_target_string): Add -mpconfig and -mwbnoinvd. + (ix86_valid_target_attribute_inner_p): Ditto. + (ix86_init_mmx_sse_builtins): Add special_args2. + * config/i386/i386.h (TARGET_PCONFIG, TARGET_PCONFIG_P, TARGET_WBNOINVD, + TARGET_WBNOINVD_P): New. + * config/i386/i386.md (UNSPECV_WBINVD, UNSPECV_WBNOINVD): New. + (define_insn "wbinvd", define_insn "wbnoinvd"): New. + * config/i386/i386.opt: Add -mpconfig and -mwbnoinvd. + * config/i386/immintrin.h (_wbinvd): New intrinsic. + * config/i386/pconfigintrin.h: New file. + * config/i386/wbnoinvdintrin.h: Ditto. + * config/i386/x86intrin.h: Add headers pconfigintrin.h and wbnoinvdintrin.h. + * doc/invoke.texi (-mpconfig, -mwbnoinvd): New. + 2018-03-05 Richard Biener PR tree-optimization/84670 diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index 4fdd489b98e..7e492899261 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -125,6 +125,8 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_ABM_SET \ (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT) +#define OPTION_MASK_ISA_PCONFIG_SET OPTION_MASK_ISA_PCONFIG +#define OPTION_MASK_ISA_WBNOINVD_SET OPTION_MASK_ISA_WBNOINVD #define OPTION_MASK_ISA_SGX_SET OPTION_MASK_ISA_SGX #define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI #define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2 @@ -241,6 +243,8 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_SHA_UNSET OPTION_MASK_ISA_SHA #define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM +#define OPTION_MASK_ISA_PCONFIG_UNSET OPTION_MASK_ISA_PCONFIG +#define OPTION_MASK_ISA_WBNOINVD_UNSET OPTION_MASK_ISA_WBNOINVD #define OPTION_MASK_ISA_SGX_UNSET OPTION_MASK_ISA_SGX #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI #define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2 @@ -690,6 +694,32 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mpconfig: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_PCONFIG_SET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_PCONFIG_SET; + } + else + { + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_PCONFIG_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_PCONFIG_UNSET; + } + return true; + + case OPT_mwbnoinvd: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_WBNOINVD_SET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_WBNOINVD_SET; + } + else + { + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_WBNOINVD_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_WBNOINVD_UNSET; + } + return true; + case OPT_mavx512dq: if (value) { diff --git a/gcc/config.gcc b/gcc/config.gcc index 2156c6bbbfd..81627d5d1c7 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -382,7 +382,8 @@ i[34567]86-*-*) gfniintrin.h cet.h avx512vbmi2intrin.h avx512vbmi2vlintrin.h avx512vnniintrin.h avx512vnnivlintrin.h vaesintrin.h vpclmulqdqintrin.h - avx512vpopcntdqvlintrin.h avx512bitalgintrin.h" + avx512vpopcntdqvlintrin.h avx512bitalgintrin.h + pconfigintrin.h wbnoinvdintrin.h" ;; x86_64-*-*) cpu_type=i386 @@ -410,7 +411,8 @@ x86_64-*-*) gfniintrin.h cet.h avx512vbmi2intrin.h avx512vbmi2vlintrin.h avx512vnniintrin.h avx512vnnivlintrin.h vaesintrin.h vpclmulqdqintrin.h - avx512vpopcntdqvlintrin.h avx512bitalgintrin.h" + avx512vpopcntdqvlintrin.h avx512bitalgintrin.h + pconfigintrin.h wbnoinvdintrin.h" ;; ia64-*-*) extra_headers=ia64intrin.h diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index aa903630c2c..4096a0b4e68 100644 --- a/gcc/config/i386/cpuid.h +++ b/gcc/config/i386/cpuid.h @@ -67,6 +67,7 @@ /* %ebx */ #define bit_CLZERO (1 << 0) +#define bit_WBNOINVD (1 << 9) /* Extended Features (%eax == 7) */ /* %ebx */ @@ -111,7 +112,7 @@ #define bit_AVX5124VNNIW (1 << 2) #define bit_AVX5124FMAPS (1 << 3) #define bit_IBT (1 << 20) - +#define bit_PCONFIG (1 << 18) /* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */ #define bit_BNDREGS (1 << 3) #define bit_BNDCSR (1 << 4) diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index ca1a2e0c37e..8c95c2eab81 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -407,6 +407,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) unsigned int has_fma = 0, has_fma4 = 0, has_xop = 0; unsigned int has_bmi = 0, has_bmi2 = 0, has_tbm = 0, has_lzcnt = 0; unsigned int has_hle = 0, has_rtm = 0, has_sgx = 0; + unsigned int has_pconfig = 0, has_wbnoinvd = 0; unsigned int has_rdrnd = 0, has_f16c = 0, has_fsgsbase = 0; unsigned int has_rdseed = 0, has_prfchw = 0, has_adx = 0; unsigned int has_osxsave = 0, has_fxsr = 0, has_xsave = 0, has_xsaveopt = 0; @@ -523,6 +524,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) has_shstk = ecx & bit_SHSTK; has_ibt = edx & bit_IBT; + has_pconfig = edx & bit_PCONFIG; } if (max_level >= 13) @@ -561,6 +563,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) { __cpuid (0x80000008, eax, ebx, ecx, edx); has_clzero = ebx & bit_CLZERO; + has_wbnoinvd = ebx & bit_WBNOINVD; } /* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv. */ @@ -1042,6 +1045,8 @@ const char *host_detect_local_cpu (int argc, const char **argv) const char *fma4 = has_fma4 ? " -mfma4" : " -mno-fma4"; const char *xop = has_xop ? " -mxop" : " -mno-xop"; const char *bmi = has_bmi ? " -mbmi" : " -mno-bmi"; + const char *pconfig = has_pconfig ? " -mpconfig" : " -mno-pconfig"; + const char *wbnoinvd = has_wbnoinvd ? " -mwbnoinvd" : " -mno-wbnoinvd"; const char *sgx = has_sgx ? " -msgx" : " -mno-sgx"; const char *bmi2 = has_bmi2 ? " -mbmi2" : " -mno-bmi2"; const char *tbm = has_tbm ? " -mtbm" : " -mno-tbm"; @@ -1092,6 +1097,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) options = concat (options, mmx, mmx3dnow, sse, sse2, sse3, ssse3, sse4a, cx16, sahf, movbe, aes, sha, pclmul, popcnt, abm, lwp, fma, fma4, xop, bmi, sgx, bmi2, + pconfig, wbnoinvd, tbm, avx, avx2, sse4_2, sse4_1, lzcnt, rtm, hle, rdrnd, f16c, fsgsbase, rdseed, prfchw, adx, fxsr, xsave, xsaveopt, avx512f, avx512er, diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index a48019499bd..7b4ad2b8466 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -415,6 +415,8 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, CODE_FOR_expandv1 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, CODE_FOR_expandv8hi_mask, "__builtin_ia32_expandloadhi128_mask", IX86_BUILTIN_PEXPANDWLOAD128, UNKNOWN, (int) V8HI_FTYPE_PCV8HI_V8HI_UQI) BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, CODE_FOR_expandv8hi_maskz, "__builtin_ia32_expandloadhi128_maskz", IX86_BUILTIN_PEXPANDWLOAD128Z, UNKNOWN, (int) V8HI_FTYPE_PCV8HI_V8HI_UQI) +BDESC (0, CODE_FOR_wbinvd, "__builtin_ia32_wbinvd", IX86_BUILTIN_WBINVD, UNKNOWN, (int) VOID_FTYPE_VOID) + BDESC_END (SPECIAL_ARGS, ARGS) /* Builtins with variable number of arguments. */ @@ -2835,7 +2837,13 @@ BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesenclast_v16qi, "__builtin_ia32_vaesenc BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesenclast_v32qi, "__builtin_ia32_vaesenclast_v32qi", IX86_BUILTIN_VAESENCLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesenclast_v64qi, "__builtin_ia32_vaesenclast_v64qi", IX86_BUILTIN_VAESENCLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) -BDESC_END (ARGS2, MPX) +BDESC_END (ARGS2, SPECIAL_ARGS2) + +BDESC_FIRST (special_args2, SPECIAL_ARGS2, + OPTION_MASK_ISA_WBNOINVD, CODE_FOR_wbnoinvd, "__builtin_ia32_wbnoinvd", IX86_BUILTIN_WBNOINVD, UNKNOWN, (int) VOID_FTYPE_VOID) + +BDESC_END (SPECIAL_ARGS2, MPX) + /* Builtins for MPX. */ BDESC_FIRST (mpx, MPX, diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c index c0b4ffed7ea..644958a9ea0 100644 --- a/gcc/config/i386/i386-c.c +++ b/gcc/config/i386/i386-c.c @@ -353,6 +353,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, ; } + if (isa_flag2 & OPTION_MASK_ISA_WBNOINVD) + def_or_undef (parse_in, "__WBNOINVD__"); if (isa_flag & OPTION_MASK_ISA_MMX) def_or_undef (parse_in, "__MMX__"); if (isa_flag & OPTION_MASK_ISA_3DNOW) @@ -405,6 +407,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__AVX512VBMI2__"); if (isa_flag & OPTION_MASK_ISA_AVX512VNNI) def_or_undef (parse_in, "__AVX512VNNI__"); + if (isa_flag2 & OPTION_MASK_ISA_PCONFIG) + def_or_undef (parse_in, "__PCONFIG__"); if (isa_flag2 & OPTION_MASK_ISA_SGX) def_or_undef (parse_in, "__SGX__"); if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 1843e5d3377..9cdc96f63da 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -2757,6 +2757,8 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2, { "-mmpx", OPTION_MASK_ISA_MPX }, { "-mvaes", OPTION_MASK_ISA_VAES }, { "-mrdpid", OPTION_MASK_ISA_RDPID }, + { "-mpconfig", OPTION_MASK_ISA_PCONFIG }, + { "-mwbnoinvd", OPTION_MASK_ISA_WBNOINVD }, { "-msgx", OPTION_MASK_ISA_SGX }, { "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW }, { "-mavx5124fmaps", OPTION_MASK_ISA_AVX5124FMAPS }, @@ -5324,6 +5326,8 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[], int mask; } attrs[] = { /* isa options */ + IX86_ATTR_ISA ("pconfig", OPT_mpconfig), + IX86_ATTR_ISA ("wbnoinvd", OPT_mwbnoinvd), IX86_ATTR_ISA ("sgx", OPT_msgx), IX86_ATTR_ISA ("avx5124fmaps", OPT_mavx5124fmaps), IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw), @@ -31287,8 +31291,10 @@ BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, IX86_BUILTIN__BDESC_ARGS_LAST, 1); BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS2_FIRST, IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1); -BDESC_VERIFYS (IX86_BUILTIN__BDESC_MPX_FIRST, +BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST, IX86_BUILTIN__BDESC_ARGS2_LAST, 1); +BDESC_VERIFYS (IX86_BUILTIN__BDESC_MPX_FIRST, + IX86_BUILTIN__BDESC_SPECIAL_ARGS2_LAST, 1); BDESC_VERIFYS (IX86_BUILTIN__BDESC_MPX_CONST_FIRST, IX86_BUILTIN__BDESC_MPX_LAST, 1); BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, @@ -31327,6 +31333,22 @@ ix86_init_mmx_sse_builtins (void) IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, ARRAY_SIZE (bdesc_special_args) - 1); + /* Add all special builtins with variable number of operands. */ + for (i = 0, d = bdesc_special_args2; + i < ARRAY_SIZE (bdesc_special_args2); + i++, d++) + { + BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST, i); + if (d->name == 0) + continue; + + ftype = (enum ix86_builtin_func_type) d->flag; + def_builtin2 (d->mask, d->name, ftype, d->code); + } + BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS2_LAST, + IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST, + ARRAY_SIZE (bdesc_special_args2) - 1); + /* Add all builtins with variable number of operands. */ for (i = 0, d = bdesc_args; i < ARRAY_SIZE (bdesc_args); @@ -38364,6 +38386,14 @@ rdseed_step: target); } + if (fcode >= IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST + && fcode <= IX86_BUILTIN__BDESC_SPECIAL_ARGS2_LAST) + { + i = fcode - IX86_BUILTIN__BDESC_SPECIAL_ARGS2_FIRST; + return ix86_expand_special_args_builtin (bdesc_special_args2 + i, exp, + target); + } + if (fcode >= IX86_BUILTIN__BDESC_ARGS_FIRST && fcode <= IX86_BUILTIN__BDESC_ARGS_LAST) { diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 6f3ae683d74..e43edd77b56 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -105,6 +105,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define TARGET_LWP_P(x) TARGET_ISA_LWP_P(x) #define TARGET_ABM TARGET_ISA_ABM #define TARGET_ABM_P(x) TARGET_ISA_ABM_P(x) +#define TARGET_PCONFIG TARGET_ISA_PCONFIG +#define TARGET_PCONFIG_P(x) TARGET_ISA_PCONFIG_P(x) +#define TARGET_WBNOINVD TARGET_ISA_WBNOINVD +#define TARGET_WBNOINVD_P(x) TARGET_ISA_WBNOINVD_P(x) #define TARGET_SGX TARGET_ISA_SGX #define TARGET_SGX_P(x) TARGET_ISA_SGX_P(x) #define TARGET_RDPID TARGET_ISA_RDPID diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 85e4b07cd0f..f4f01c3c0f4 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -237,6 +237,8 @@ UNSPECV_XSAVEC64 UNSPECV_XGETBV UNSPECV_XSETBV + UNSPECV_WBINVD + UNSPECV_WBNOINVD ;; For atomic compound assignments. UNSPECV_FNSTENV @@ -20582,6 +20584,20 @@ "rdpid\t%0" [(set_attr "type" "other")]) +;; Intirinsics for > i486 + +(define_insn "wbinvd" + [(unspec_volatile [(const_int 0)] UNSPECV_WBINVD)] + "" + "wbinvd" + [(set_attr "type" "other")]) + +(define_insn "wbnoinvd" + [(unspec_volatile [(const_int 0)] UNSPECV_WBNOINVD)] + "TARGET_WBNOINVD" + "wbnoinvd" + [(set_attr "type" "other")]) + (include "mmx.md") (include "sse.md") (include "sync.md") diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 3a306bbd73f..150d78e345a 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -777,6 +777,14 @@ mpopcnt Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save Support code generation of popcnt instruction. +mpconfig +Target Report Mask(ISA_PCONFIG) Var(ix86_isa_flags2) Save +Support PCONFIG built-in functions and code generation. + +mwbnoinvd +Target Report Mask(ISA_WBNOINVD) Var(ix86_isa_flags2) Save +Support WBNOINVD built-in functions and code generation. + msgx Target Report Mask(ISA_SGX) Var(ix86_isa_flags2) Save Support SGX built-in functions and code generation. diff --git a/gcc/config/i386/immintrin.h b/gcc/config/i386/immintrin.h index a5ad8af32b0..ad0fb216fa7 100644 --- a/gcc/config/i386/immintrin.h +++ b/gcc/config/i386/immintrin.h @@ -110,6 +110,13 @@ #include +extern __inline void +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_wbinvd (void) +{ + __builtin_ia32_wbinvd (); +} + #ifndef __RDRND__ #pragma GCC push_options #pragma GCC target("rdrnd") diff --git a/gcc/config/i386/pconfigintrin.h b/gcc/config/i386/pconfigintrin.h new file mode 100644 index 00000000000..1c9c35c5e2b --- /dev/null +++ b/gcc/config/i386/pconfigintrin.h @@ -0,0 +1,55 @@ +#ifndef _X86INTRIN_H_INCLUDED +#error "Never use directly; include instead." +#endif + +#ifndef _PCONFIGINTRIN_H_INCLUDED +#define _PCONFIGINTRIN_H_INCLUDED + +#ifndef __PCONFIG__ +#pragma GCC push_options +#pragma GCC target("pconfig") +#define __DISABLE_PCONFIG__ +#endif /* __PCONFIG__ */ + +#define __pconfig_b(leaf, b, retval) \ + __asm__ __volatile__ ("pconfig\n\t" \ + : "=a" (retval) \ + : "a" (leaf), "b" (b) \ + : "cc") + +#define __pconfig_generic(leaf, b, c, d, retval) \ + __asm__ __volatile__ ("pconfig\n\t" \ + : "=a" (retval), "=b" (b), "=c" (c), "=d" (d) \ + : "a" (leaf), "b" (b), "c" (c), "d" (d) \ + : "cc") + +extern __inline unsigned int +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_pconfig_u32 (const unsigned int __L, size_t __D[]) +{ + enum __pconfig_type + { + __PCONFIG_KEY_PROGRAM = 0x01, + }; + + unsigned int __R = 0; + + if (!__builtin_constant_p (__L)) + __pconfig_generic (__L, __D[0], __D[1], __D[2], __R); + else switch (__L) + { + case __PCONFIG_KEY_PROGRAM: + __pconfig_b (__L, __D[0], __R); + break; + default: + __pconfig_generic (__L, __D[0], __D[1], __D[2], __R); + } + return __R; +} + +#ifdef __DISABLE_PCONFIG__ +#undef __DISABLE_PCONFIG__ +#pragma GCC pop_options +#endif /* __DISABLE_PCONFIG__ */ + +#endif /* _PCONFIGINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/wbnoinvdintrin.h b/gcc/config/i386/wbnoinvdintrin.h new file mode 100644 index 00000000000..9312a0082c9 --- /dev/null +++ b/gcc/config/i386/wbnoinvdintrin.h @@ -0,0 +1,26 @@ +#ifndef _X86INTRIN_H_INCLUDED +#error "Never use directly; include instead." +#endif + +#ifndef _WBNOINVDINTRIN_H_INCLUDED +#define _WBNOINVDINTRIN_H_INCLUDED + +#ifndef __WBNOINVD__ +#pragma GCC push_options +#pragma GCC target("wbnoinvd") +#define __DISABLE_WBNOINVD__ +#endif /* __WBNOINVD__ */ + +extern __inline void +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_wbnoinvd (void) +{ + __builtin_ia32_wbnoinvd (); +} + +#ifdef __DISABLE_WBNOINVD__ +#undef __DISABLE_WBNOINVD__ +#pragma GCC pop_options +#endif /* __DISABLE_WBNOINVD__ */ + +#endif /* _WBNOINVDINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/x86intrin.h b/gcc/config/i386/x86intrin.h index b5fdfa1cbd2..b12aecc80b5 100644 --- a/gcc/config/i386/x86intrin.h +++ b/gcc/config/i386/x86intrin.h @@ -77,6 +77,8 @@ #include +#include + #endif /* __iamcu__ */ #include @@ -95,6 +97,8 @@ #include +#include + #include #endif /* __iamcu__ */ diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index ad0fec6bef0..80e4efffe11 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1249,7 +1249,7 @@ See RS/6000 and PowerPC Options. -mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol -mavx2 -mavx512f -mavx512pf -mavx512er -mavx512cd -mavx512vl @gol -mavx512bw -mavx512dq -mavx512ifma -mavx512vbmi -msha -maes @gol --mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol +-mpclmul -mfsgsbase -mrdrnd -mf16c -mfma -mpconfig -mwbnoinvd @gol -mprefetchwt1 -mclflushopt -mxsavec -mxsaves @gol -msse4a -m3dnow -m3dnowa -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop @gol -mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx @gol @@ -27174,6 +27174,12 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @itemx -mfma @opindex mfma @need 200 +@itemx -mpconfig +@opindex mpconfig +@need 200 +@itemx -mwbnoinvd +@opindex mwbnoinvd +@need 200 @itemx -mfma4 @opindex mfma4 @need 200 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b4a6556a5f9..569f040a6bf 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,15 @@ +2018-03-05 Olga Makhotina + + * g++.dg/other/i386-2.C: Add -mpconfig and -mwbnoinvd. + * g++.dg/other/i386-3.C: Ditto. + * gcc.target/i386/sse-12.c: Ditto. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-23.c: Add pconfig and wbnoinvd. + * gcc.target/i386/wbinvd-1.c: New test. + * gcc.target/i386/wbnoinvd-1.c: Ditto. + * gcc.target/i386/pconfig-1.c: Ditto. + 2018-03-05 Pádraig Brady Nathan Sidwell diff --git a/gcc/testsuite/g++.dg/other/i386-2.C b/gcc/testsuite/g++.dg/other/i386-2.C index 75a8c27bb16..a70d9f413a6 100644 --- a/gcc/testsuite/g++.dg/other/i386-2.C +++ b/gcc/testsuite/g++.dg/other/i386-2.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg" } */ +/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, diff --git a/gcc/testsuite/g++.dg/other/i386-3.C b/gcc/testsuite/g++.dg/other/i386-3.C index 444c246aa32..73eb5e74c9a 100644 --- a/gcc/testsuite/g++.dg/other/i386-3.C +++ b/gcc/testsuite/g++.dg/other/i386-3.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg" } */ +/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, diff --git a/gcc/testsuite/gcc.target/i386/pconfig-1.c b/gcc/testsuite/gcc.target/i386/pconfig-1.c new file mode 100644 index 00000000000..a3fc4f411fe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pconfig-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mpconfig" } */ +/* { dg-final { scan-assembler-times "pconfig" 5 } } */ + +#include + +extern unsigned int leaf; + +#define PCONFIG_KEY_PROGRAM 0x01 + +int test () +{ + size_t D[3] = {1, 2, 3}; + + unsigned int res1 = _pconfig_u32 (leaf, D); + + unsigned int res2 = _pconfig_u32 (PCONFIG_KEY_PROGRAM, D); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c index cd4509699b7..f7f55f4317e 100644 --- a/gcc/testsuite/gcc.target/i386/sse-12.c +++ b/gcc/testsuite/gcc.target/i386/sse-12.c @@ -3,7 +3,7 @@ popcntintrin.h gfniintrin.h and mm_malloc.h are usable with -O -std=c89 -pedantic-errors. */ /* { dg-do compile } */ -/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg" } */ +/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd" } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c index b43f903086e..310ebfff73a 100644 --- a/gcc/testsuite/gcc.target/i386/sse-13.c +++ b/gcc/testsuite/gcc.target/i386/sse-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd" } */ /* { dg-add-options bind_pic_locally } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c index fb2c35ab909..0f663bec702 100644 --- a/gcc/testsuite/gcc.target/i386/sse-14.c +++ b/gcc/testsuite/gcc.target/i386/sse-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni" } */ +/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd" } */ /* { dg-add-options bind_pic_locally } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c index 8f93d65f5c1..cb5cdd8cd10 100644 --- a/gcc/testsuite/gcc.target/i386/sse-23.c +++ b/gcc/testsuite/gcc.target/i386/sse-23.c @@ -678,6 +678,6 @@ #define __builtin_ia32_vpclmulqdq_v2di(A, B, C) __builtin_ia32_vpclmulqdq_v2di(A, B, 1) #define __builtin_ia32_vpclmulqdq_v8di(A, B, C) __builtin_ia32_vpclmulqdq_v8di(A, B, 1) -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg,pconfig,wbnoinvd") #include diff --git a/gcc/testsuite/gcc.target/i386/wbinvd-1.c b/gcc/testsuite/gcc.target/i386/wbinvd-1.c new file mode 100644 index 00000000000..7854cc22679 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/wbinvd-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-times "wbinvd" 2 } } */ + +#include "immintrin.h" + +volatile void +test () +{ + _wbinvd(); +} diff --git a/gcc/testsuite/gcc.target/i386/wbnoinvd-1.c b/gcc/testsuite/gcc.target/i386/wbnoinvd-1.c new file mode 100644 index 00000000000..bda84cd4c94 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/wbnoinvd-1.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mwbnoinvd" } */ +/* { dg-final { scan-assembler-times "wbnoinvd" 2 } } */ + +#include "x86intrin.h" + +void test () +{ + _wbnoinvd(); +} -- 2.30.2