From 14a49f31d3977c2b072b9ef2fdeebebca69fe1d7 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Sat, 28 Mar 2020 11:22:43 -0500 Subject: [PATCH] nir/lower_int64: Lower 8 and 16-bit downcasts with nir_lower_mov64 We have the code to do the lowering, we were just missing the boilerplate bits to make should_lower_int64_alu_instr return true. Fixes: 62d55f12818e "nir: Wire up int64 lowering functions" Reviewed-by: Alyssa Rosenzweig Reviewed-by: Ian Romanick Part-of: --- src/compiler/nir/nir_lower_int64.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/compiler/nir/nir_lower_int64.c b/src/compiler/nir/nir_lower_int64.c index 6e3f8526f7b..e18a5481225 100644 --- a/src/compiler/nir/nir_lower_int64.c +++ b/src/compiler/nir/nir_lower_int64.c @@ -692,8 +692,12 @@ nir_lower_int64_op_to_options_mask(nir_op opcode) return nir_lower_divmod64; case nir_op_b2i64: case nir_op_i2b1: + case nir_op_i2i8: + case nir_op_i2i16: case nir_op_i2i32: case nir_op_i2i64: + case nir_op_u2u8: + case nir_op_u2u16: case nir_op_u2u32: case nir_op_u2u64: case nir_op_bcsel: @@ -855,7 +859,11 @@ should_lower_int64_alu_instr(const nir_instr *instr, const void *_options) switch (alu->op) { case nir_op_i2b1: + case nir_op_i2i8: + case nir_op_i2i16: case nir_op_i2i32: + case nir_op_u2u8: + case nir_op_u2u16: case nir_op_u2u32: assert(alu->src[0].src.is_ssa); if (alu->src[0].src.ssa->bit_size != 64) -- 2.30.2