From 14b6cd39aadcac72e8fce47e24445037bae70309 Mon Sep 17 00:00:00 2001 From: Kevin Lim Date: Fri, 3 Mar 2006 15:41:57 -0500 Subject: [PATCH] Remove intr_post function. No longer being used. --HG-- extra : convert_revision : 1dc1d691244fd2edbd21d5cbf0764622d8f95fbb --- arch/alpha/ev5.cc | 27 --------------------------- 1 file changed, 27 deletions(-) diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index 9193e40f0..2cbfe7fd6 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -163,33 +163,6 @@ ExecContext::ev5_temp_trap(Fault fault) } -void -AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc) -{ - bool use_pc = (fault == NoFault); - - if (fault->isA()) - panic("arithmetic faults NYI..."); - - // compute exception restart address - if (use_pc || fault->isA() || fault->isA()) { - // traps... skip faulting instruction - regs->miscRegs.setReg(IPR_EXC_ADDR, regs->pc + 4); - } else { - // fault, post fault at excepting instruction - regs->miscRegs.setReg(IPR_EXC_ADDR, regs->pc); - } - - // jump to expection address (PAL PC bit set here as well...) - if (!use_pc) - regs->npc = regs->miscRegs.readReg(IPR_PAL_BASE) + - (dynamic_cast(fault.get()))->vect(); - else - regs->npc = regs->miscRegs.readReg(IPR_PAL_BASE) + pc; - - // that's it! (orders of magnitude less painful than x86) -} - Fault ExecContext::hwrei() { -- 2.30.2