From 14ca8b58f0d3d82a9009b67baedd7b11d5bfc296 Mon Sep 17 00:00:00 2001 From: Ciro Santilli Date: Fri, 1 May 2020 15:10:40 +0100 Subject: [PATCH] arch-arm: show names on --debug-flags MiscRegs write: Before this commit it would show only numbers: Writing to misc reg 19 (19) : 0x74178 and now it also shows the name: Writing MiscReg lockaddr (19 19) : 0x74178 MiscReg reads were already showing names and are unchanged, e.g.: Reading MiscReg sctlr_el1 with clear res1 bits: 0x18100800 Change-Id: If46da88359ce4a549a6a50080a2b13077d41e373 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28467 Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- src/arch/arm/isa.cc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index b3d6726d9..b18bbb055 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -787,12 +787,12 @@ ISA::setMiscRegNoEffect(int misc_reg, RegVal val) if (upper > 0) { miscRegs[lower] = bits(v, 31, 0); miscRegs[upper] = bits(v, 63, 32); - DPRINTF(MiscRegs, "Writing to misc reg %d (%d:%d) : %#x\n", - misc_reg, lower, upper, v); + DPRINTF(MiscRegs, "Writing MiscReg %s (%d %d:%d) : %#x\n", + miscRegName[misc_reg], misc_reg, lower, upper, v); } else { miscRegs[lower] = v; - DPRINTF(MiscRegs, "Writing to misc reg %d (%d) : %#x\n", - misc_reg, lower, v); + DPRINTF(MiscRegs, "Writing MiscReg %s (%d %d) : %#x\n", + miscRegName[misc_reg], misc_reg, lower, v); } } -- 2.30.2