From 14f09a6cba595d2f9fa3b21a9eee2ff22b56d2c4 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 22 Sep 2020 15:42:57 +0100 Subject: [PATCH] create a JTAG platform and connect it up. jtagremote is actually running --- src/soc/litex/florent/sim.py | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/src/soc/litex/florent/sim.py b/src/soc/litex/florent/sim.py index 87521ebd..c797a43d 100755 --- a/src/soc/litex/florent/sim.py +++ b/src/soc/litex/florent/sim.py @@ -164,6 +164,23 @@ class LibreSoCSim(SoCSDRAM): self.add_constant("MEMTEST_DATA_DEBUG", 1) + # add JTAG platform pins + platform.add_extension([ + ("jtag", 0, + Subsignal("tck", Pins(1)), + Subsignal("tms", Pins(1)), + Subsignal("tdi", Pins(1)), + Subsignal("tdo", Pins(1)), + ) + ]) + + jtagpads = platform.request("jtag") + self.comb += self.cpu.jtag_tck.eq(jtagpads.tck) + self.comb += self.cpu.jtag_tms.eq(jtagpads.tms) + self.comb += self.cpu.jtag_tdi.eq(jtagpads.tdi) + self.comb += jtagpads.tdo.eq(self.cpu.jtag_tdo) + + # Debug --------------------------------------------------------------- if not debug: return -- 2.30.2