From 15232df4a3afdcfd6552502231f10d87c7f90266 Mon Sep 17 00:00:00 2001 From: "Frank Ch. Eigler" Date: Fri, 27 Mar 1998 22:00:56 +0000 Subject: [PATCH] * Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] code into single PKE-style vu.[ch]. [ChangeLog] Fri Mar 27 16:19:29 1998 Frank Ch. Eigler start-sanitize-sky * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o. * interp.c (sim_{load,store}_register): Use new vu[01]_device static to access VU registers. (decode_coproc): Added skeleton of sky COP2 (VU) instruction decoding. Work in progress. * mips.igen (LDCzz, SDCzz): Removed *5900 case for this overlapping/redundant bit pattern. (LQC2, SQC2): Added *5900 COP2 instruction skeleta. Work in progress. * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for status register. end-sanitize-sky * interp.c (cop_lq, cop_sq): New functions for future 128-bit access to coprocessor registers. * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above. [ChangeLog.sky] * sky-engine.c (engine_run): Adapted from vu[01] -> vu merge. * sky-hardware.c (register_devices): Ditto * sky-pke.c (pke_fifo_*): Made these functions private again, now that the GPUIF code does not use them. * sky-pke.h (pke_fifo_*): Removed newly private declarations. * sky-vu.c (*): Major rework: merge of old sky-vu0.c and sky-vu1.c. Management of two VU devices parallels two PKEs. Work in progress. * sky-vu.h (*): Other half of merge. (vu_device): New struct, parallel to pke_device. --- sim/mips/.Sanitize | 2 +- sim/mips/ChangeLog | 25 ++ sim/mips/Makefile.in | 2 - sim/mips/interp.c | 212 ++++++++++++++- sim/mips/mips.igen | 622 ++++++++++++++++++++++++++++++++++++++++++- sim/mips/sim-main.h | 14 +- sim/mips/sky-pke.c | 14 +- sim/mips/sky-pke.h | 7 +- sim/mips/sky-vu0.c | 111 -------- sim/mips/sky-vu0.h | 24 -- sim/mips/sky-vu1.c | 310 --------------------- sim/mips/sky-vu1.h | 27 -- 12 files changed, 864 insertions(+), 506 deletions(-) delete mode 100644 sim/mips/sky-vu0.c delete mode 100644 sim/mips/sky-vu0.h delete mode 100644 sim/mips/sky-vu1.c delete mode 100644 sim/mips/sky-vu1.h diff --git a/sim/mips/.Sanitize b/sim/mips/.Sanitize index 455c5e74f6b..42534729db0 100644 --- a/sim/mips/.Sanitize +++ b/sim/mips/.Sanitize @@ -35,7 +35,7 @@ sky_files="ChangeLog.sky sky-device.c sky-device.h sky-dma.c sky-dma.h sky-bits. sky_files="$sky_files sky-engine.c sky-gpuif.c sky-gpuif.h" sky_files="$sky_files sky-hardware.c sky-hardware.h sky-gdb.c" sky_files="$sky_files sky-libvpe.c sky-libvpe.h sky-pke.c sky-pke.h" -sky_files="$sky_files sky-vpe.h sky-vu.h sky-vu.c sky-vu0.c sky-vu0.h sky-vu1.c sky-vu1.h" +sky_files="$sky_files sky-vpe.h sky-vu.h sky-vu.c" if ( echo $* | grep keep\-sky > /dev/null ) ; then keep_these_too="${sky_files} ${keep_these_too}" else diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index c91f927daeb..9301718d8a2 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,28 @@ +Fri Mar 27 16:19:29 1998 Frank Ch. Eigler + +start-sanitize-sky + * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o. + + * interp.c (sim_{load,store}_register): Use new vu[01]_device + static to access VU registers. + (decode_coproc): Added skeleton of sky COP2 (VU) instruction + decoding. Work in progress. + + * mips.igen (LDCzz, SDCzz): Removed *5900 case for this + overlapping/redundant bit pattern. + (LQC2, SQC2): Added *5900 COP2 instruction skeleta. Work in + progress. + + * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for + status register. + +end-sanitize-sky + + * interp.c (cop_lq, cop_sq): New functions for future 128-bit + access to coprocessor registers. + + * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above. + Fri Mar 27 16:15:52 1998 Andrew Cagney * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in index abfb81ad960..d6d332b5fcb 100644 --- a/sim/mips/Makefile.in +++ b/sim/mips/Makefile.in @@ -18,8 +18,6 @@ SIM_SKY_OBJS = \ sky-libvpe.o \ sky-pke.o \ sky-vu.o \ - sky-vu0.o \ - sky-vu1.o \ sky-gs.o \ sky-gdb.o # end-sanitize-sky diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 0be63da5eb9..c1903311d13 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -14,8 +14,7 @@ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. $Revision$ - $Author$ - $Date$ + $Date$ NOTEs: @@ -39,6 +38,14 @@ code on the hardware. #include "sim-options.h" #include "sim-assert.h" +/* start-sanitize-sky */ +#ifdef TARGET_SKY +#include "sky-vu.h" +#include "sky-vpe.h" +#include "sky-libvpe.h" +#endif +/* end-sanitize-sky */ + #include "config.h" #include @@ -154,6 +161,7 @@ static void ColdReset PARAMS((SIM_DESC sd)); #define MONITOR_BASE (0xBFC00000) #define MONITOR_SIZE (1 << 11) #define MEM_SIZE (2 << 20) + /* start-sanitize-sky */ #ifdef TARGET_SKY #undef MEM_SIZE @@ -672,7 +680,7 @@ sim_store_register (sd,rn,memory,length) rn = rn - NUM_R5900_REGS; if (rn < NUM_VU_INTEGER_REGS) - size = write_vu_int_reg (&(vu0_state.regs), rn, memory); + size = write_vu_int_reg (& vu0_device.state->regs, rn, memory); else if( rn < NUM_VU_REGS ) vu_regs[0].f[rn - NUM_VU_INTEGER_REGS] = T2H_4( *(unsigned int *) memory ); @@ -680,7 +688,7 @@ sim_store_register (sd,rn,memory,length) rn = rn - NUM_VU_REGS; if( rn < NUM_VU_INTEGER_REGS ) - size = write_vu_int_reg (&(vu1_state.regs), rn, memory); + size = write_vu_int_reg (& vu1_device.state->regs, rn, memory); else if( rn < NUM_VU_REGS ) vu_regs[1].f[rn - NUM_VU_INTEGER_REGS] = T2H_4( *(unsigned int *) memory ); @@ -768,7 +776,7 @@ sim_fetch_register (sd,rn,memory,length) rn = rn - NUM_R5900_REGS; if (rn < NUM_VU_INTEGER_REGS) - size = read_vu_int_reg (&(vu0_state.regs), rn, memory); + size = read_vu_int_reg (& vu0_device.state->regs, rn, memory); else if (rn < NUM_VU_REGS) *((unsigned int *) memory) = H2T_4( vu_regs[0].f[rn - NUM_VU_INTEGER_REGS] ); @@ -777,7 +785,7 @@ sim_fetch_register (sd,rn,memory,length) rn = rn - NUM_VU_REGS; if (rn < NUM_VU_INTEGER_REGS) - size = read_vu_int_reg (&(vu1_state.regs), rn, memory); + size = read_vu_int_reg (& vu1_device.state->regs, rn, memory); else if (rn < NUM_VU_REGS) (*(unsigned int *) memory) = H2T_4( vu_regs[1].f[rn - NUM_VU_INTEGER_REGS] ); @@ -3239,6 +3247,33 @@ cop_ld (SIM_DESC sd, return; } + +void +cop_lq (SIM_DESC sd, + sim_cpu *cpu, + address_word cia, + int coproc_num, + int coproc_reg, + unsigned128 memword) +{ + switch (coproc_num) + { + /* start-sanitize-sky */ + case 2: + /* XXX COP2 */ + break; + /* end-sanitize-sky */ + + default: + sim_io_printf(sd,"COP_LQ(%d,%d,??) at PC = 0x%s : TODO (architecture specific)\n", + coproc_num,coproc_reg,pr_addr(cia)); + break; + } + + return; +} + + unsigned int cop_sw (SIM_DESC sd, sim_cpu *cpu, @@ -3298,6 +3333,33 @@ cop_sd (SIM_DESC sd, return(value); } + +unsigned128 +cop_sq (SIM_DESC sd, + sim_cpu *cpu, + address_word cia, + int coproc_num, + int coproc_reg) +{ + unsigned128 value = {0, 0}; + switch (coproc_num) + { + /* start-sanitize-sky */ + case 2: + /* XXX COP2 */ + break; + /* end-sanitize-sky */ + + default: + sim_io_printf(sd,"COP_SQ(%d,%d) at PC = 0x%s : TODO (architecture specific)\n", + coproc_num,coproc_reg,pr_addr(cia)); + break; + } + + return(value); +} + + void decode_coproc (SIM_DESC sd, sim_cpu *cpu, @@ -3439,9 +3501,140 @@ decode_coproc (SIM_DESC sd, break; case 2: /* undefined co-processor */ - sim_io_eprintf(sd,"COP2 instruction 0x%08X at PC = 0x%s : No handler present\n",instruction,pr_addr(cia)); - break; - + { + int handle = 0; + + /* start-sanitize-sky */ + /* On the R5900, this refers to a "VU" vector co-processor. */ + + int i_25_21 = (instruction >> 21) & 0x1f; + int i_20_16 = (instruction >> 16) & 0x1f; + int i_15_11 = (instruction >> 11) & 0x1f; + int i_15_0 = instruction & 0xffff; + int i_10_1 = (instruction >> 1) & 0x3ff; + int interlock = instruction & 0x01; + unsigned_4 vpe_status = sim_core_read_aligned_4 (cpu, cia, read_map, VPE0_STAT); + int vpe_busy = (vpe_status & 0x00000001); + /* setup for semantic.c-like actions below */ + typedef unsigned_4 instruction_word; + int CIA = cia; + int NIA = cia + 4; + sim_cpu* CPU_ = cpu; + + handle = 1; + + /* test COP2 usability */ + if(! (SR & status_CU2)) + { + SignalException(CoProcessorUnusable,instruction); + /* NOTREACHED */ + } + + /* classify & execute basic COP2 instructions */ + if(i_25_21 == 0x08 && i_20_16 == 0x00) /* BC2F */ + { + address_word offset = EXTEND16(i_15_0) << 2; + if(! vpe_busy) DELAY_SLOT(cia + 4 + offset); + } + else if(i_25_21 == 0x08 && i_20_16==0x02) /* BC2FL */ + { + address_word offset = EXTEND16(i_15_0) << 2; + if(! vpe_busy) DELAY_SLOT(cia + 4 + offset); + else NULLIFY_NEXT_INSTRUCTION(); + } + else if(i_25_21 == 0x08 && i_20_16 == 0x01) /* BC2T */ + { + address_word offset = EXTEND16(i_15_0) << 2; + if(vpe_busy) DELAY_SLOT(cia + 4 + offset); + } + else if(i_25_21 == 0x08 && i_20_16 == 0x03) /* BC2TL */ + { + address_word offset = EXTEND16(i_15_0) << 2; + if(vpe_busy) DELAY_SLOT(cia + 4 + offset); + else NULLIFY_NEXT_INSTRUCTION(); + } + else if((i_25_21 == 0x02 && i_10_1 == 0x000) || /* CFC2 */ + (i_25_21 == 0x06 && i_10_1 == 0x000)) /* CTC2 */ + { + int rt = i_20_16; + int id = i_15_11; + int to_vu = (i_25_21 == 0x06); /* transfer direction */ + address_word vu_cr_addr; /* VU control register address */ + + if(interlock) + while(vpe_busy) + { + vu0_issue(sd); /* advance one clock cycle */ + vpe_status = sim_core_read_aligned_4 (cpu, cia, read_map, VPE0_STAT); + vpe_busy = vpe_status & 0x00000001; + } + + /* compute VU register address */ + vu_cr_addr = VU0_MST + (id * 16); + + /* read or write word */ + if(to_vu) /* CTC2 */ + { + unsigned_4 data = GPR[rt]; + sim_core_write_aligned_4(cpu, cia, write_map, vu_cr_addr, data); + } + else /* CFC2 */ + { + unsigned_4 data = sim_core_read_aligned_4(cpu, cia, read_map, vu_cr_addr); + GPR[rt] = EXTEND64(data); + } + } + else if((i_25_21 == 0x01) || /* QMFC2 */ + (i_25_21 == 0x05)) /* QMTC2 */ + { + int rt = i_20_16; + int id = i_15_11; + int to_vu = (i_25_21 == 0x05); /* transfer direction */ + address_word vu_cr_addr; /* VU control register address */ + + if(interlock) + while(vpe_busy) + { + vu0_issue(sd); /* advance one clock cycle */ + vpe_status = sim_core_read_aligned_4 (cpu, cia, read_map, VPE0_STAT); + vpe_busy = vpe_status & 0x00000001; + } + + /* compute VU register address */ + vu_cr_addr = VU0_VF00 + (id * 16); + + /* read or write word */ + if(to_vu) /* CTC2 */ + { + unsigned_4 data = GPR[rt]; + sim_core_write_aligned_4(cpu, cia, write_map, vu_cr_addr, data); + } + else /* CFC2 */ + { + unsigned_4 data = sim_core_read_aligned_4(cpu, cia, read_map, vu_cr_addr); + GPR[rt] = EXTEND64(data); + } + } + /* other COP2 instructions */ + else + { + SignalException(ReservedInstruction,instruction); + /* NOTREACHED */ + } + + /* cleanup for semantic.c-like actions above */ + PC = NIA; + + /* end-sanitize-sky */ + + if(! handle) + { + sim_io_eprintf(sd,"COP2 instruction 0x%08X at PC = 0x%s : No handler present\n", + instruction,pr_addr(cia)); + } + } + break; + case 1: /* should not occur (FPU co-processor) */ case 3: /* should not occur (FPU co-processor) */ SignalException(ReservedInstruction,instruction); @@ -3451,6 +3644,7 @@ decode_coproc (SIM_DESC sd, return; } + /*-- instruction simulation -------------------------------------------------*/ /* When the IGEN simulator is being built, the function below is be diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index 64a7c73eb9c..603ec81f9fe 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -31,10 +31,10 @@ // Models known by this simulator -:model:::mipsI:mipsI: -:model:::mipsII:mipsII: -:model:::mipsIII:mipsIII: -:model:::mipsIV:mipsIV: +:model:::mipsI:mips3000: +:model:::mipsII:mips6000: +:model:::mipsIII:mips4000: +:model:::mipsIV:mips8000: :model:::mips16:mips16: // start-sanitize-r5900 :model:::r5900:mips5900: @@ -43,6 +43,9 @@ // start-sanitize-tx19 :model:::tx19:tx19: // end-sanitize-tx19 +// start-sanitize-vr4320 +:model:::vr4320:mips4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 :model:::vr5400:mips5400: :model:::mdmx:mdmx: @@ -79,6 +82,9 @@ "add r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -100,6 +106,9 @@ "addi r, r, IMMEDIATE" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -121,6 +130,9 @@ "add r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -140,6 +152,9 @@ 000000,5.RS,5.RT,5.RD,00000,100001:SPECIAL:32::ADDU *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -160,6 +175,9 @@ "and r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -179,6 +197,9 @@ "and r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -198,6 +219,9 @@ "beq r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -221,6 +245,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -244,6 +271,9 @@ "bgez r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -265,6 +295,9 @@ "bgezal r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -289,6 +322,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -317,6 +353,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -340,6 +379,9 @@ "bgtz r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -363,6 +405,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -388,6 +433,9 @@ "blez r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -413,6 +461,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -436,6 +487,9 @@ "bltz r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -457,6 +511,9 @@ "bltzal r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -483,6 +540,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -509,6 +569,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -534,6 +597,9 @@ "bne r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -557,6 +623,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -580,6 +649,9 @@ "break" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -615,6 +687,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -638,6 +713,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -660,6 +738,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -680,6 +761,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -700,6 +784,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -741,6 +828,9 @@ *mipsIV: *r3900: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -770,6 +860,9 @@ "div r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -808,6 +901,9 @@ "divu r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -903,6 +999,9 @@ // start-sanitize-tx19 *tx19: // end-sanitize-tx19 +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 { do_dmult (SD_, RS, RT, 0, 1); } @@ -927,6 +1026,9 @@ // start-sanitize-tx19 *tx19: // end-sanitize-tx19 +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 { do_dmult (SD_, RS, RT, 0, 0); } @@ -949,6 +1051,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -970,6 +1075,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -991,6 +1099,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1012,6 +1123,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1033,6 +1147,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1054,6 +1171,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1075,6 +1195,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1096,6 +1219,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1117,6 +1243,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1138,6 +1267,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1160,6 +1292,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1179,6 +1314,9 @@ "j " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1201,6 +1339,9 @@ "jal " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1225,6 +1366,9 @@ "jalr r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1246,6 +1390,9 @@ "jr r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1284,6 +1431,9 @@ "lb r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1330,6 +1480,9 @@ "lbu r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1374,6 +1527,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1415,12 +1571,12 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 -// start-sanitize-r5900 -*r5900: -// end-sanitize-r5900 *r3900: // start-sanitize-tx19 *tx19: @@ -1450,11 +1606,46 @@ } +// start-sanitize-sky +110110,5.BASE,5.RT,16.OFFSET:NORMAL:64::LQC2 +"lqc2 r, (r)" +*r5900: +{ + unsigned32 instruction = instruction_0; + signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16); + int destreg = ((instruction >> 16) & 0x0000001F); + signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)]; + { + address_word vaddr = ((unsigned64)op1 + offset); + address_word paddr; + int uncached; + if ((vaddr & 0x0f) != 0) + SignalExceptionAddressLoad(); + else + { + if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL)) + { + unsigned64 memval = 0; + unsigned64 memval1 = 0; + unsigned128 qw = U16_8(memval, memval1); /* XXX: check order */ + /* XXX: block on VU0 pipeline if necessary */ + LoadMemory(&memval,&memval1,uncached,AccessLength_QUADWORD,paddr,vaddr,isDATA,isREAL); + COP_LQ(((instruction >> 26) & 0x3),destreg,qw);; + } + } + } +} +// end-sanitize-sky + + 011010,5.BASE,5.RT,16.OFFSET:NORMAL:64::LDL "ldl r, (r)" *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1500,6 +1691,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1551,6 +1745,9 @@ "lh r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1597,6 +1794,9 @@ "lhu r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1645,6 +1845,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1693,6 +1896,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1733,6 +1939,9 @@ "lui r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1752,6 +1961,9 @@ "lw r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1798,6 +2010,9 @@ "lwc r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1844,6 +2059,9 @@ "lwl r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1892,6 +2110,9 @@ "lwr r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1948,6 +2169,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -1994,6 +2218,9 @@ "mfhi r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2016,6 +2243,9 @@ "mflo r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2038,6 +2268,9 @@ "movn r, r, r" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2054,6 +2287,9 @@ "movz r, r, r" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2070,6 +2306,9 @@ "mthi r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2096,6 +2335,9 @@ "mtlo r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2121,6 +2363,9 @@ 000000,5.RS,5.RT,00000,00000011000:SPECIAL:32::MULT "mult r, r" *mipsI,mipsII,mipsIII,mipsIV: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 { signed64 prod; CHECKHILO ("Multiplication"); @@ -2129,6 +2374,8 @@ LO = EXTEND32 (VL4_8 (prod)); HI = EXTEND32 (VH4_8 (prod)); } + + 000000,5.RS,5.RT,5.RD,00000011000:SPECIAL:32::MULT "mult r, r, r" *vr5000: @@ -2157,6 +2404,9 @@ 000000,5.RS,5.RT,00000,00000011001:SPECIAL:32::MULTU "multu r, r" *mipsI,mipsII,mipsIII,mipsIV: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 { unsigned64 prod; CHECKHILO ("Multiplication"); @@ -2194,6 +2444,9 @@ "nor r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2213,6 +2466,9 @@ "or r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2232,6 +2488,9 @@ "ori r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2250,6 +2509,9 @@ 110011,5.RS,nnnnn,16.OFFSET:NORMAL:32::PREF *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2276,6 +2538,9 @@ "sb r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2323,6 +2588,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2371,6 +2639,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2415,6 +2686,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2458,6 +2732,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2495,11 +2772,50 @@ } +// start-sanitize-sky +111010,5.BASE,5.RT,16.OFFSET:NORMAL:64::SQC2 +"sqc2 r, (r)" +*r5900: +{ + unsigned32 instruction = instruction_0; + signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16); + int destreg = ((instruction >> 16) & 0x0000001F); + signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)]; + { + address_word vaddr = ((unsigned64)op1 + offset); + address_word paddr; + int uncached; + if ((vaddr & 0x0f) != 0) + SignalExceptionAddressStore(); + else + { + if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL)) + { + unsigned128 qw; + unsigned64 memval0 = 0; + unsigned64 memval1 = 0; + qw = COP_SQ(((instruction >> 26) & 0x3),destreg); + memval0 = *A8_16(& qw, 0); + memval1 = *A8_16(& qw, 1); + { + StoreMemory(uncached,AccessLength_WORD,memval0,memval1,paddr,vaddr,isREAL); + } + } + } + } +} +// end-sanitize-sky + + + 101100,5.BASE,5.RT,16.OFFSET:NORMAL:64::SDL "sdl r, (r)" *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2545,6 +2861,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2578,6 +2897,9 @@ "sh r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2626,6 +2948,9 @@ "sll r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2647,6 +2972,9 @@ "sllv r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2668,6 +2996,9 @@ "slt r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2687,6 +3018,9 @@ "slti r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2706,6 +3040,9 @@ "sltiu r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2724,6 +3061,9 @@ "sltu r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2743,6 +3083,9 @@ "sra r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2764,6 +3107,9 @@ "srav r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2785,6 +3131,9 @@ "srl r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2806,6 +3155,9 @@ "srlv r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2827,6 +3179,9 @@ "sub r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2848,6 +3203,9 @@ "subu r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2867,6 +3225,9 @@ "sw r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -2912,12 +3273,12 @@ "swc r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 -// start-sanitize-r5900 -*r5900: -// end-sanitize-r5900 *r3900: // start-sanitize-tx19 *tx19: @@ -2957,6 +3318,9 @@ "swl r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3004,6 +3368,9 @@ "swr r, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3042,6 +3409,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3061,6 +3431,9 @@ "syscall " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3082,6 +3455,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3104,6 +3480,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3126,6 +3505,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3148,6 +3530,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3170,6 +3555,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3192,6 +3580,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3214,6 +3605,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3236,6 +3630,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3258,6 +3655,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3280,6 +3680,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3302,6 +3705,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3324,6 +3730,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3344,6 +3753,9 @@ "xor r, r, r" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3363,6 +3775,9 @@ "xori r, r, " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3452,6 +3867,9 @@ "abs.%s f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3478,6 +3896,9 @@ "add.%s f, f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3536,6 +3957,9 @@ "bc1%s%s , " *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3608,6 +4032,9 @@ "c.%s.%s , f, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3625,6 +4052,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3654,6 +4084,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3708,6 +4141,9 @@ "c%sc1 r, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3765,6 +4201,9 @@ "cvt.d.%s f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3791,6 +4230,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3819,6 +4261,9 @@ "cvt.s.%s f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3844,6 +4289,9 @@ "cvt.w.%s f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3869,6 +4317,9 @@ "div.%s f, f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3921,6 +4372,9 @@ "dm%sc1 r, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3956,6 +4410,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -3986,6 +4443,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4016,6 +4476,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4043,6 +4506,9 @@ "ldxc1 f, r(r)" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4076,6 +4542,9 @@ "lwc1 f, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4122,6 +4591,9 @@ "lwxc1 f, r(r)" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4165,6 +4637,9 @@ "madd.d f, f, f, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4184,6 +4659,9 @@ "madd.s f, f, f, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4221,6 +4699,9 @@ "m%sc1 r, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4241,6 +4722,9 @@ "mov.%s f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4264,6 +4748,9 @@ "mov%s r, r, " *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4281,6 +4768,9 @@ "mov%s.%s f, f, " *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4302,6 +4792,9 @@ 010001,10,3.FMT,5.RT,5.FS,5.FD,010011:COP1:32::MOVN.fmt *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4330,6 +4823,9 @@ "movz.%s f, f, r" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4352,6 +4848,9 @@ "msub.d f, f, f, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4375,6 +4874,9 @@ "msub.s f, f, f, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4400,6 +4902,9 @@ "mul.%s f, f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4426,6 +4931,9 @@ "neg.%s f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4452,6 +4960,9 @@ "nmadd.d f, f, f, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4472,6 +4983,9 @@ "nmadd.s f, f, f, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4492,6 +5006,9 @@ "nmsub.d f, f, f, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4512,6 +5029,9 @@ "nmsub.s f, f, f, f" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4531,6 +5051,9 @@ "prefx , r(r)" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4552,6 +5075,9 @@ *mipsIV: "recip.%s f, f" *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4574,6 +5100,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4604,6 +5133,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4632,6 +5164,9 @@ *mipsIV: "rsqrt.%s f, f" *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4655,6 +5190,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4678,10 +5216,12 @@ } - 010011,5.RS,5.RT,vvvvv,00000001001:COP1X:64::SDXC1 *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4718,6 +5258,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4743,6 +5286,9 @@ "sub.%s f, f, f" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4770,6 +5316,9 @@ "swc1 f, (r)" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4815,6 +5364,9 @@ "swxc1 f, r(r)" *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4854,6 +5406,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4884,6 +5439,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4919,6 +5477,9 @@ "bc0f " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4931,6 +5492,9 @@ "bc0fl " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4952,6 +5516,9 @@ "bc0tl " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4964,6 +5531,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -4993,6 +5563,9 @@ "di" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -5005,6 +5578,9 @@ "ei" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -5018,6 +5594,9 @@ *mipsIII: *mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -5030,6 +5609,9 @@ "mfc0 r, r # " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -5044,6 +5626,9 @@ "mtc0 r, r # " *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -5059,6 +5644,9 @@ "tlbp" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -5071,6 +5659,9 @@ "tlbr" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -5083,6 +5674,9 @@ "tlbwi" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -5095,6 +5689,9 @@ "tlbwr" *mipsI,mipsII,mipsIII,mipsIV: *vr5000: +// start-sanitize-vr4320 +*vr4320: +// end-sanitize-vr4320 // start-sanitize-vr5400 *vr5400: // end-sanitize-vr5400 @@ -5104,6 +5701,9 @@ :include:16::m16.igen +// start-sanitize-vr4320 +:include::vr4320:vr4320.igen +// end-sanitize-vr4320 // start-sanitize-vr5400 :include::vr5400:vr5400.igen :include:64,f::mdmx.igen diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h index 697d1457472..87a434c5571 100644 --- a/sim/mips/sim-main.h +++ b/sim/mips/sim-main.h @@ -513,7 +513,8 @@ struct _sim_cpu { #ifndef TM_TXVU_H /* Number of machine registers */ -#define NUM_VU_REGS 152 +#define NUM_VU_REGS 153 +#define NUM_VU_INTEGER_REGS 17 #define NUM_R5900_REGS 128 @@ -681,6 +682,11 @@ struct sim_state { #define status_TS (1 << 21) /* TLB shutdown has occurred */ #define status_ERL (1 << 2) /* Error level */ #define status_RP (1 << 27) /* Reduced Power mode */ +/* begin-sanitize-r5900 */ +#define status_CU0 (1 << 28) /* COP0 usable */ +#define status_CU1 (1 << 29) /* COP1 usable */ +#define status_CU2 (1 << 30) /* COP2 usable */ +/* begin-sanitize-r5900 */ #define cause_BD ((unsigned)1 << 31) /* Exception in branch delay slot */ @@ -757,17 +763,23 @@ void signal_exception (SIM_DESC sd, sim_cpu *cpu, address_word cia, int exceptio void cop_lw PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg, unsigned int memword)); void cop_ld PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg, uword64 memword)); +void cop_lq PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg, unsigned128 memword)); unsigned int cop_sw PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg)); uword64 cop_sd PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg)); +unsigned128 cop_sq PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg)); #define COP_LW(coproc_num,coproc_reg,memword) \ cop_lw (SD, CPU, cia, coproc_num, coproc_reg, memword) #define COP_LD(coproc_num,coproc_reg,memword) \ cop_ld (SD, CPU, cia, coproc_num, coproc_reg, memword) +#define COP_LQ(coproc_num,coproc_reg,memword) \ +cop_lq (SD, CPU, cia, coproc_num, coproc_reg, memword) #define COP_SW(coproc_num,coproc_reg) \ cop_sw (SD, CPU, cia, coproc_num, coproc_reg) #define COP_SD(coproc_num,coproc_reg) \ cop_sd (SD, CPU, cia, coproc_num, coproc_reg) +#define COP_SQ(coproc_num,coproc_reg) \ +cop_sq (SD, CPU, cia, coproc_num, coproc_reg) void decode_coproc PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, unsigned int instruction)); #define DecodeCoproc(instruction) \ diff --git a/sim/mips/sky-pke.c b/sim/mips/sky-pke.c index cf7408b0684..a0db39abedf 100644 --- a/sim/mips/sky-pke.c +++ b/sim/mips/sky-pke.c @@ -4,15 +4,16 @@ #include "config.h" #include -#include "sky-pke.h" -#include "sky-dma.h" +#include "sim-main.h" #include "sim-bits.h" #include "sim-assert.h" -#include "sky-vu0.h" -#include "sky-vu1.h" +#include "sky-pke.h" +#include "sky-dma.h" +#include "sky-vu.h" #include "sky-gpuif.h" #include "sky-device.h" + #ifdef HAVE_STRING_H #include #else @@ -64,6 +65,11 @@ static void pke_code_direct(struct pke_device* me, unsigned_4 pkecode); static void pke_code_directhl(struct pke_device* me, unsigned_4 pkecode); static void pke_code_unpack(struct pke_device* me, unsigned_4 pkecode); static void pke_code_error(struct pke_device* me, unsigned_4 pkecode); +unsigned_4 pke_fifo_flush(struct pke_fifo*); +void pke_fifo_reset(struct pke_fifo*); +struct fifo_quadword* pke_fifo_fit(struct pke_fifo*); +struct fifo_quadword* pke_fifo_access(struct pke_fifo*, unsigned_4 qwnum); +void pke_fifo_old(struct pke_fifo*, unsigned_4 qwnum); diff --git a/sim/mips/sky-pke.h b/sim/mips/sky-pke.h index 59558420ab0..88b4d016406 100644 --- a/sim/mips/sky-pke.h +++ b/sim/mips/sky-pke.h @@ -15,16 +15,11 @@ void pke0_issue(SIM_DESC sd); void pke1_attach(SIM_DESC sd); void pke1_issue(SIM_DESC sd); + /* structs declared below */ struct pke_fifo; struct fifo_quadword; -unsigned_4 pke_fifo_flush(struct pke_fifo*); -void pke_fifo_reset(struct pke_fifo*); -struct fifo_quadword* pke_fifo_fit(struct pke_fifo*); -struct fifo_quadword* pke_fifo_access(struct pke_fifo*, unsigned_4 qwnum); -void pke_fifo_old(struct pke_fifo*, unsigned_4 qwnum); - /* Quadword data type */ diff --git a/sim/mips/sky-vu0.c b/sim/mips/sky-vu0.c deleted file mode 100644 index a685713e4cc..00000000000 --- a/sim/mips/sky-vu0.c +++ /dev/null @@ -1,111 +0,0 @@ -/* Copyright (C) 1998, Cygnus Solutions - - */ - -#include "sim-main.h" - -#include "sky-device.h" -#include "sky-vu.h" -#include "sky-vu0.h" - -VectorUnitState vu0_state; - -/* these are aligned versions of zalloc() pointers - do not zfree()! */ -static char* vu0_mem0_buffer = 0; -static char* vu0_mem1_buffer = 0; - - -void -vu0_issue(void) -{ -} - -static int -vu0_io_read_buffer(device *me, - void *dest, - int space, - address_word addr, - unsigned nr_bytes, - sim_cpu *processor, - sim_cia cia) -{ - if (addr < VU0_REGISTER_WINDOW_START) - return 0; - - addr -= VU0_REGISTER_WINDOW_START; - - /* Adjust nr_bytes if too big */ - if ((addr + nr_bytes) > VU_REG_END) - nr_bytes -= addr + nr_bytes - VU_REG_END; - - return read_vu_registers (&vu0_state, addr, nr_bytes, dest); -} - -static int -vu0_io_write_buffer(device *me, - const void *source, - int space, - address_word addr, - unsigned nr_bytes, - sim_cpu *processor, - sim_cia cia) -{ - if (addr < VU0_REGISTER_WINDOW_START) - return 0; - - addr -= VU0_REGISTER_WINDOW_START; - - /* Adjust nr_bytes if too big */ - if ((addr + nr_bytes) > VU_REG_END) - nr_bytes -= addr + nr_bytes - VU_REG_END; - - return write_vu_registers (&vu0_state, addr, nr_bytes, source); -} - -device vu0_device = - { - "vu0", - &vu0_io_read_buffer, - &vu0_io_write_buffer - }; - -void -vu0_attach(SIM_DESC sd) -{ - sim_core_attach (sd, - NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - VU0_REGISTER_WINDOW_START, - VU_REG_END /*nr_bytes*/, - 0 /*modulo*/, - &vu0_device, - NULL /*buffer*/); - - vu0_mem0_buffer = zalloc(VU0_MEM0_SIZE); - vu0_mem0_buffer = (void*) ALIGN_16((unsigned)vu0_mem0_buffer); - sim_core_attach (sd, - NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - VU0_MEM0_WINDOW_START, - VU0_MEM0_SIZE /*nr_bytes*/, - 0 /*modulo*/, - 0 /*device*/, - vu0_mem0_buffer /*buffer*/); - - vu0_mem1_buffer = zalloc(VU0_MEM1_SIZE); - vu0_mem1_buffer = (void*) ALIGN_16((unsigned)vu0_mem1_buffer); - sim_core_attach (sd, - NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - VU0_MEM1_WINDOW_START, - VU0_MEM1_SIZE /*nr_bytes*/, - 0 /*modulo*/, - 0 /*device*/, - vu0_mem1_buffer /*buffer*/); -} diff --git a/sim/mips/sky-vu0.h b/sim/mips/sky-vu0.h deleted file mode 100644 index 2519384ec9a..00000000000 --- a/sim/mips/sky-vu0.h +++ /dev/null @@ -1,24 +0,0 @@ -/* Copyright (C) 1998, Cygnus Solutions - - */ - -#ifndef VU0_H_ -#define VU0_H_ - -#include "sim-main.h" - -void vu0_attach(SIM_DESC sd); -void vu0_issue(void); - -#define VU0_MEM0_WINDOW_START 0x11000000 -#define VU0_MEM0_SIZE 0x1000 /* 4K = 4096 */ - -#define VU0_MEM1_WINDOW_START 0x11004000 -#define VU0_MEM1_SIZE 0x1000 /* 4K = 4096 */ - -#define VU0_REGISTER_WINDOW_START 0x10000c00 - -#define VPE0_STAT 0x10000fd0 -#define VU0_CIA 0x10000fe0 - -#endif diff --git a/sim/mips/sky-vu1.c b/sim/mips/sky-vu1.c deleted file mode 100644 index c7f7b4a936d..00000000000 --- a/sim/mips/sky-vu1.c +++ /dev/null @@ -1,310 +0,0 @@ -/* Copyright (C) 1998, Cygnus Solutions - - */ - -#include "sim-main.h" -#include "sim-endian.h" - -#include "sky-device.h" -#include "sky-vu1.h" -#include "sky-libvpe.h" -#include "sky-vu.h" -#include "sky-bits.h" - -#include - -VectorUnitState vu1_state; - -#define sim_warning printf - -/* these are aligned versions of zalloc() pointers - do not zfree()! */ -static char* vu1_umem_buffer = 0; -static char* vu1_mem_buffer = 0; - -void init_vu1(void); -void init_vu(VectorUnitState *state, - char* umem_buffer, unsigned umem_dw_size, - char* mem_buffer, unsigned mem_qw_size); - -#if 0 -static void dump_mem() { - int i; - typedef int T[2048][4]; - T *mem = (T*)&vu1_mem_buffer; - - for (i = 0; i < 200; i++) { - printf("%d: %x %x %x %x\n", i, (*mem)[i][0], (*mem)[i][1], (*mem)[i][2], (*mem)[i][3]); - } -} -#endif - -void -vu1_issue(void) -{ - if (vu1_state.runState == VU_RUN) - vpecallms_cycle(&vu1_state); -} - -static int -vu1_io_read_register_window(device *me, - void *dest, - int space, - address_word addr, - unsigned nr_bytes, - sim_cpu *processor, - sim_cia cia) -{ - if (addr < VU1_REGISTER_WINDOW_START) - return 0; - - addr -= VU1_REGISTER_WINDOW_START; - - /* Adjust nr_bytes if too big */ - if ((addr + nr_bytes) > VU_REG_END) - nr_bytes -= addr + nr_bytes - VU_REG_END; - - return read_vu_registers (&vu1_state, addr, nr_bytes, dest); -} - -static int -vu1_io_write_register_window(device *me, - const void *source, - int space, - address_word addr, - unsigned nr_bytes, - sim_cpu *processor, - sim_cia cia) -{ - if (addr < VU1_REGISTER_WINDOW_START) - return 0; - - addr -= VU1_REGISTER_WINDOW_START; - - /* Adjust nr_bytes if too big */ - if ((addr + nr_bytes) > VU_REG_END) - nr_bytes -= addr + nr_bytes - VU_REG_END; - - return write_vu_registers (&vu1_state, addr, nr_bytes, source); -} - -device vu1_device = - { - "vu1", - &vu1_io_read_register_window, - &vu1_io_write_register_window - }; - -void -vu1_init(SIM_DESC sd) -{ - - sim_core_attach (sd, - NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - VU1_REGISTER_WINDOW_START, - VU_REG_END /*nr_bytes*/, - 0 /*modulo*/, - &vu1_device, - NULL /*buffer*/); - - vu1_umem_buffer = zalloc(VU1_MEM0_SIZE); - vu1_umem_buffer = (void*) ALIGN_16((unsigned)vu1_umem_buffer); - sim_core_attach (sd, - NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - VU1_MEM0_WINDOW_START, - VU1_MEM0_SIZE /*nr_bytes*/, - 0 /*modulo*/, - 0 /*device*/, - vu1_umem_buffer /*buffer*/); - - vu1_mem_buffer = zalloc(VU1_MEM1_SIZE + 2*sizeof(unsigned_16)); - vu1_mem_buffer = (void*) ALIGN_16((unsigned)vu1_mem_buffer); - sim_core_attach (sd, - NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - VU1_MEM1_WINDOW_START, - VU1_MEM1_SIZE /*nr_bytes*/, - 0 /*modulo*/, - 0 /*device*/, - vu1_mem_buffer /*buffer*/); - - init_vu1(); - /*initvpe();*/ - vpecallms_init(&vu1_state); -} - -/****************************************************************************/ -/* */ -/* Sony Computer Entertainment CONFIDENTIAL */ -/* (C) 1997 Sony Computer Entertainment Inc. All Rights Reserved */ -/* */ -/* VPE1 simulator */ -/* */ -/****************************************************************************/ - -#include -#include -#include -#include "sky-libvpe.h" - -char ifilename[64] = "vu.bin"; -char ofilename[64] = ""; -char pfilename[64] = ""; - -static void abend2(char *fmt, char* p) { - fprintf(stderr, fmt, p); - exit(1); -} - -void getoption(VectorUnitState* state); - -void init_vu1(void) { - init_vu(&vu1_state, - &vu1_umem_buffer[0], VU1_MEM0_SIZE/8, - &vu1_mem_buffer[0], VU1_MEM1_SIZE/16); -} - -void init_vu(VectorUnitState *state, - char* umem_buffer, unsigned umem_dw_size, - char* mem_buffer, unsigned mem_qw_size) -{ - FILE *fp; - int i, j; - u_long data[4]; - - /* set up memory buffers */ - state->uMEM_buffer = (uMEM_Entry_Type *) umem_buffer; - state->uMEM_size = umem_dw_size; - state->MEM_buffer = (MEM_Entry_Type*) mem_buffer; - state->MEM_size = mem_qw_size; - - /* set up run state */ - state->runState = VU_READY; - - /* read option */ - getoption(state); - - /* read instruction file (mandatory) */ - if (*ifilename) { - if((fp = fopen(ifilename, "r")) != NULL) { - for (i = 0; fread(&data[0], 4, 1, fp) != 0; i++) { - fread(&data[1], 4, 1, fp); - LoadMMem(state, i, data, 1); - } - fclose(fp); - } - } - - /* PKE dirven simvpe */ - if (*pfilename) { - /* initpke(pfilename); */ - initvpe(&vu1_state); - /* while (simpke() != -1) - simvpe(); */ - } - - /* conventional simvpe */ - else { - initvpe(&vu1_state); - /*simvpe();*/ - } - - /* write result memory image (optional) */ - if (*ofilename) { - if((fp = fopen(ofilename, "w")) == NULL) - abend2("%s: can not open\n", ofilename); - - for(i = 0; i < 2048; i++){ - StoreVUMem(state, i, data, 1); - for(j = 0; j < 4; j++) - fwrite(&data[j], 4, 1, fp); - } - fclose(fp); - } -} - -#if 0 -static void Usage(void) -{ - fprintf(stderr, "Usage: simvpe [options]\n"); - fprintf(stderr, "\t\t-i instruction-file\n"); - fprintf(stderr, "\t\t-o output-memory-file\n"); - fprintf(stderr, "\t\t-t PKE-file (text type)\n"); - fprintf(stderr, "\t\t-s start-address [default = 0]\n"); - fprintf(stderr, "\t\t-d [interactive mode enable: default desable]\n"); - fprintf(stderr, "\t\t-v [statistics mode enable: default desable]\n"); - fprintf(stderr, "\t\t-p [debug print mode enable: default desable]\n"); -} -#endif - -void getoption(VectorUnitState* state) -{ -#if 0 - int startline = 0; - int count = 1; -#endif - - state->junk._is_dbg = 1; - state->junk._vpepc = 0; - state->junk._is_verb = 0; - state->junk._is_dump = 0; - state->junk._pgpuif = 4; /* MEMGPUIF */ - state->junk._ITOP = 20; - state->junk._TOP = 10; - -#if 0 - while(argc - count){ - if(argv[count][0] == '-'){ - switch(argv[count][1]){ - case 'i': - strcpy(ifilename, argv[count+1]); - count += 2; - break; - case 'o': - strcpy(ofilename, argv[count+1]); - count += 2; - break; - case 't': - strcpy(pfilename, argv[count+1]); - count += 2; - break; - case 's': - sscanf(argv[count+1], "%d", &startline); - state->junk._vpepc = startline; - count += 2; - break; - case 'd': - state->junk._is_dbg = 1; - count += 1; - break; - case 'v': - state->junk._is_verb = 1; - count += 1; - break; - case 'p': - state->junk._is_dump = 1; - count += 1; - break; - case 'h': - case '?': - Usage(); - exit(1); - break; - default: - Usage(); - exit(1); - } - }else{ - Usage(); - exit(1); - } - } -#endif -} diff --git a/sim/mips/sky-vu1.h b/sim/mips/sky-vu1.h deleted file mode 100644 index 17e9d99a674..00000000000 --- a/sim/mips/sky-vu1.h +++ /dev/null @@ -1,27 +0,0 @@ -/* Copyright (C) 1998, Cygnus Solutions - - */ - -#ifndef VU1_H_ -#define VU1_H_ - -#include "sim-main.h" - -void vu1_issue(void); -void vu1_init(SIM_DESC sd); -int vu1_status(void); -int vu1_busy(void); - -#define VU1_MEM0_WINDOW_START 0x11008000 -#define VU1_MEM0_SIZE 0x4000 /* 16K = 16384 */ - -#define VU1_MEM1_WINDOW_START 0x1100c000 -#define VU1_MEM1_SIZE 0x4000 /* 16K = 16384 */ - -#define VU1_REGISTER_WINDOW_START 0x11007000 - -/* FIX ME: These should be derived from enum in sky-vu.h */ -#define VPU_STAT 0x110073d0 -#define VU1_CIA 0x110073e0 - -#endif -- 2.30.2