From 15acf593e707c6666459c0cfd121a5f0fc996571 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 31 Dec 2013 14:54:06 +0100
Subject: [PATCH] Added additional checks for A_SIGNED == B_SIGNED for cells
 with that constraint

---
 kernel/rtlil.cc | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index b8c9e21ac..4916ca728 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -337,7 +337,7 @@ namespace {
 			expected_ports.insert(name);
 		}
 
-		void check_expected()
+		void check_expected(bool check_matched_sign = true)
 		{
 			for (auto &para : cell->parameters)
 				if (expected_params.count(para.first) == 0)
@@ -345,6 +345,13 @@ namespace {
 			for (auto &conn : cell->connections)
 				if (expected_ports.count(conn.first) == 0)
 					error(__LINE__);
+
+			if (expected_params.count("\\A_SIGNED") != 0 && expected_params.count("\\B_SIGNED") && check_matched_sign) {
+				bool a_is_signed = param("\\A_SIGNED") != 0;
+				bool b_is_signed = param("\\B_SIGNED") != 0;
+				if (a_is_signed != b_is_signed)
+					error(__LINE__);
+			}
 		}
 
 		void check_gate(const char *ports)
@@ -403,7 +410,7 @@ namespace {
 				port("\\A", param("\\A_WIDTH"));
 				port("\\B", param("\\B_WIDTH"));
 				port("\\Y", param("\\Y_WIDTH"));
-				check_expected();
+				check_expected(false);
 				return;
 			}
 
@@ -425,7 +432,7 @@ namespace {
 				port("\\A", param("\\A_WIDTH"));
 				port("\\B", param("\\B_WIDTH"));
 				port("\\Y", param("\\Y_WIDTH"));
-				check_expected();
+				check_expected(cell->type != "$pow");
 				return;
 			}
 
@@ -443,7 +450,7 @@ namespace {
 				port("\\A", param("\\A_WIDTH"));
 				port("\\B", param("\\B_WIDTH"));
 				port("\\Y", param("\\Y_WIDTH"));
-				check_expected();
+				check_expected(false);
 				return;
 			}
 
-- 
2.30.2