From 15ff3b753c3b7ad793474abb64b4cb8f1da47dc6 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 31 Mar 2018 09:25:23 +0100 Subject: [PATCH] clean up pinspec, remove redundant arguments --- src/spec/interfaces.py | 37 +++++++- src/spec/m_class.py | 193 ++++++++++++++++++++--------------------- src/spec/minitest.py | 40 ++++----- 3 files changed, 146 insertions(+), 124 deletions(-) diff --git a/src/spec/interfaces.py b/src/spec/interfaces.py index c354c80..77086f2 100644 --- a/src/spec/interfaces.py +++ b/src/spec/interfaces.py @@ -21,6 +21,36 @@ class PinGen(object): __call__ is used to effectively create a lambda function, which in combination with setattr (below) gives the function a name in the Pinouts class, according to the pinspec. + + arguments to __call__ (which ends up as Pinouts.i2s, Pinouts.sdmmc + and so on, according to spec.pinfunctions.pinspec) are: + + suffix: e.g. GPIO or SD or SPI + offs : a tuple of (Bank, Bank offset) as a string, integer + mux : which column in the multiplexer + start : the start of a subset of pins to be inserted + limit : the end of the subset (or the number if start also given) + spec : *EXTRA* pins to be inserted. + + spec is slightly complicated, basically there's extra + functions that we want to be on the same pin (but a different mux) + because their use is mutually-exclusive. without this spec + argument the extra pins would need to be MANUALLY moved about + during the development of the pinmux, if the "main" pins + were also moved about. this would be a pain. + + so instead, extra pins are given of the form: + { 'EXTRA1' : ('PREEXISTING_NAME', MUX_COLUMN), + ... + } + + where the function EXTRA1 will always be placed on the SAME ROW + as PREEXISTING_NAME, just in MUX_COLUMN. this may be done + several times i.e. multiple new EXTRA functions can be added + on the same row as PRE_EXISTING_NAME, just with different + MUX_COLUMN values. + + Note: spec must implicitly be in the same Bank. """ def __init__(self, pinouts, fname, pinfn, bankspec): @@ -29,8 +59,9 @@ class PinGen(object): self.pinfn = pinfn self.fname = fname - def __call__(self, suffix, offs, bank, mux, + def __call__(self, suffix, offs, mux, start=None, limit=None, spec=None, origsuffix=None): + bank = offs[0] pingroup = self.pinfn(suffix, bank) if isinstance(pingroup, tuple): prefix, pingroup = pingroup @@ -192,9 +223,9 @@ class Pins(object): continue if name not in spec: continue - idx_, mux_, bank_ = spec[name] + idx_, mux_ = spec[name] idx_ = names[idx_] - pin = {mux_: (name_, bank_)} + pin = {mux_: (name_, bank)} if idx_ in res: res[idx_].update(pin) else: diff --git a/src/spec/m_class.py b/src/spec/m_class.py index cacab5e..6503d56 100644 --- a/src/spec/m_class.py +++ b/src/spec/m_class.py @@ -106,122 +106,113 @@ def pinspec(of): ps = PinSpec(pinbanks, fixedpins, function_names) # Bank A, 0-15 - ps.gpio("", ('A', 0), "A", 0, 0, 16) - ps.spi("0", ('A', 0), "A", 3) - ps.uartfull("1", ('A', 0), "A", 2) - ps.i2c("0", ('A', 4), "A", 2) - ps.emmc("", ('A', 0), "A", 1) - #ps.uart("0", ('A', 14), "A", 1) - ps.spi("1", ('A', 6), "A", 2) - ps.eint("", ('A', 10), "A", 1, start=0, limit=6) - ps.eint("", ('A', 4), "A", 3, start=0, limit=6) - ps.sdmmc("0", ('A', 10), "A", 2) - ps.jtag("0", ('A', 10), "A", 3) - ps.uart("0", ('A', 14), "A", 3) + ps.gpio("", ('A', 0), 0, 0, 16) + ps.spi("0", ('A', 0), 3) + ps.uartfull("1", ('A', 0), 2) + ps.i2c("0", ('A', 4), 2) + ps.emmc("", ('A', 0), 1) + #ps.uart("0", ('A', 14), 1) + ps.spi("1", ('A', 6), 2) + ps.eint("", ('A', 10), 1, start=0, limit=6) + ps.eint("", ('A', 4), 3, start=0, limit=6) + ps.sdmmc("0", ('A', 10), 2) + ps.jtag("0", ('A', 10), 3) + ps.uart("0", ('A', 14), 3) # Bank B, 16-47 - ps.gpio("", ('B', 0), "B", 0, 0, 28) - ps.rgbttl("0", ('B', 0), "B", 1) - ps.spi("0", ('B', 12), "B", 2) - ps.quadspi("", ('B', 4), "B", 2, limit=4) - ps.uart("1", ('B', 16), "B", 2) - ps.i2c("2", ('B', 18), "B", 2) - ps.pwm("", ('B', 9), "B", 2, start=0, limit=1) - ps.pwm("", ('B', 20), "B", 2, start=1, limit=2) - ps.sdmmc("0", ('B', 22), "B", 2) - ps.eint("", ('B', 0), "B", 3, start=6, limit=4) - ps.flexbus2("", ('B', 4), "B", 3) - ps.i2c("0", ('B', 0), "B", 2) - ps.uart("0", ('B', 2), "B", 2) - ps.uart("2", ('B', 10), "B", 2) + ps.gpio("", ('B', 0), 0, 0, 28) + ps.rgbttl("0", ('B', 0), 1) + ps.spi("0", ('B', 12), 2) + ps.quadspi("", ('B', 4), 2, limit=4) + ps.uart("1", ('B', 16), 2) + ps.i2c("2", ('B', 18), 2) + ps.pwm("", ('B', 9), 2, start=0, limit=1) + ps.pwm("", ('B', 20), 2, start=1, limit=2) + ps.sdmmc("0", ('B', 22), 2) + ps.eint("", ('B', 0), 3, start=6, limit=4) + ps.flexbus2("", ('B', 4), 3) + ps.i2c("0", ('B', 0), 2) + ps.uart("0", ('B', 2), 2) + ps.uart("2", ('B', 10), 2) # Bank C, 48-71 - ps.gpio("", ("C", 0), "C", 0, 0, 24) - ps.ulpi("0", ('C', 0), "C", 1) - ps.ulpi("1", ('C', 12), "C", 1) - ps.spi("1", ('C', 8), "C", 2) - #ps.spi("1", ('C', 28), "C", 2) - ps.uartfull("0", ('C', 20), "C", 3) - ps.eint("", ('C', 0), "C", 3, start=10, limit=8) - ps.jtag("1", ('C', 8), "C", 3) - ps.eint("", ('C', 12), "C", 3, start=22, limit=8) - ps.uart("0", ('C', 22), "C", 2) - ps.i2s("", ('C', 13), "C", 2) - ps.pwm("", ('C', 21), "C", 2, start=2, limit=1) + ps.gpio("", ("C", 0), 0, 0, 24) + ps.ulpi("0", ('C', 0), 1) + ps.ulpi("1", ('C', 12), 1) + ps.spi("1", ('C', 8), 2) + #ps.spi("1", ('C', 28), 2) + ps.uartfull("0", ('C', 20), 3) + ps.eint("", ('C', 0), 3, start=10, limit=8) + ps.jtag("1", ('C', 8), 3) + ps.eint("", ('C', 12), 3, start=22, limit=8) + ps.uart("0", ('C', 22), 2) + ps.i2s("", ('C', 13), 2) + ps.pwm("", ('C', 21), 2, start=2, limit=1) # Bank D, 72-96 - # ok this is slightly complicated, basically there's extra - # functions that we want to be on the same pin (but a different mux) - # because their use is mutually-exclusive. you can't have FB_TS - # at the same time as FB_ALE for example. FB_BWE2 even has two - # mutually exclusive functions. these extra functions are - # specified here, so that when e.g. FB_BWE2 has been positioned, - # FB_A0 will be placed in bank d, mux column 3, *on the same pin*. - # this saves messing about, because if FB_BWE2 moved to a - # different pin so would FB_A0 (and FB_CS2) likewise have to be - # moved. and the rest. + # see comment in spec.interfaces.PinGen, this is complicated. flexspec = { - 'FB_TS': ('FB_ALE', 2, "D"), - 'FB_CS2': ('FB_BWE2', 2, "D"), - 'FB_A0': ('FB_BWE2', 3, "D"), - 'FB_CS3': ('FB_BWE3', 2, "D"), - 'FB_A1': ('FB_BWE3', 3, "D"), - 'FB_TBST': ('FB_OE', 2, "D"), - 'FB_TSIZ0': ('FB_BWE0', 2, "D"), - 'FB_TSIZ1': ('FB_BWE1', 2, "D"), + 'FB_TS': ('FB_ALE', 2), + 'FB_CS2': ('FB_BWE2', 2), + 'FB_A0': ('FB_BWE2', 3), + 'FB_CS3': ('FB_BWE3', 2), + 'FB_A1': ('FB_BWE3', 3), + 'FB_TBST': ('FB_OE', 2), + 'FB_TSIZ0': ('FB_BWE0', 2), + 'FB_TSIZ1': ('FB_BWE1', 2), } - #ps.mcu8080("", 72, "D", 1) - ps.gpio("", ('D', 0), "D", 0, 0, 24) - ps.flexbus1("", ('D', 0), "D", 1, spec=flexspec) - ps.i2c("1", ('D', 8), "D", 3) - ps.pwm("", ('D', 21), "D", 1, start=0, limit=3) - ps.i2c("0", ('D', 10), "D", 3) - ps.i2c("2", ('D', 19), "D", 2) - ps.uartfull("0", ('D', 0), "D", 2) - ps.uart("1", ('D', 21), "D", 2) - ps.uart("2", ('D', 13), "D", 2) - ps.eint("", ('D', 19), "D", 3, start=18, limit=4) - ps.eint("", ('D', 23), "D", 3, start=9, limit=1) - ps.eint("", ('D', 13), "D", 3, start=5, limit=4) - ps.eint("", ('D', 0), "D", 3, start=30, limit=2) - ps.i2c("1", ('D', 2), "D", 3) - ps.sdmmc("1", ('D', 4), "D", 2) + #ps.mcu8080("", 72, 1) + ps.gpio("", ('D', 0), 0, 0, 24) + ps.flexbus1("", ('D', 0), 1, spec=flexspec) + ps.i2c("1", ('D', 8), 3) + ps.pwm("", ('D', 21), 1, start=0, limit=3) + ps.i2c("0", ('D', 10), 3) + ps.i2c("2", ('D', 19), 2) + ps.uartfull("0", ('D', 0), 2) + ps.uart("1", ('D', 21), 2) + ps.uart("2", ('D', 13), 2) + ps.eint("", ('D', 19), 3, start=18, limit=4) + ps.eint("", ('D', 23), 3, start=9, limit=1) + ps.eint("", ('D', 13), 3, start=5, limit=4) + ps.eint("", ('D', 0), 3, start=30, limit=2) + ps.i2c("1", ('D', 2), 3) + ps.sdmmc("1", ('D', 4), 2) # Bank E - ps.gpio("", ('E', 0), "E", 0, 0, 24) - ps.flexbus2("", ('E', 0), "E", 1) - ps.sdmmc("1", ('E', 0), "E", 2) - ps.sdmmc("2", ('E', 8), "E", 2) - ps.quadspi("", ('E', 18), "E", 2) - ps.uartfull("1", ('E', 14), "E", 2) - ps.i2c("1", ('E', 6), "E", 2) - ps.eint("", ('E', 0), "E", 3, start=10, limit=8) - ps.eint("", ('E', 8), "E", 3, start=22, limit=6) - ps.emmc("", ('E', 14), "E", 3) + ps.gpio("", ('E', 0), 0, 0, 24) + ps.flexbus2("", ('E', 0), 1) + ps.sdmmc("1", ('E', 0), 2) + ps.sdmmc("2", ('E', 8), 2) + ps.quadspi("", ('E', 18), 2) + ps.uartfull("1", ('E', 14), 2) + ps.i2c("1", ('E', 6), 2) + ps.eint("", ('E', 0), 3, start=10, limit=8) + ps.eint("", ('E', 8), 3, start=22, limit=6) + ps.emmc("", ('E', 14), 3) # Bank F - ps.gpio("", ('F', 0), "F", 0, 0, 10) - ps.i2s("", ('F', 0), "F", 1) - ps.i2c("0", ('F', 6), "F", 2) - ps.pwm("", ('F', 8), "F", 2, start=0, limit=1) - ps.pwm("", ('F', 9), "F", 2, start=1, limit=1) - ps.uart("2", ('F', 8), "F", 1) - ps.sdmmc("2", ('F', 0), "F", 2) - ps.eint("", ('F', 0), "F", 3, start=18, limit=4) - ps.pwm("", ('F', 4), "F", 3, start=2, limit=1) - ps.eint("", ('F', 5), "F", 3, start=7, limit=1) - ps.eint("", ('F', 6), "F", 3, start=28, limit=4) + ps.gpio("", ('F', 0), 0, 0, 10) + ps.i2s("", ('F', 0), 1) + ps.i2c("0", ('F', 6), 2) + ps.pwm("", ('F', 8), 2, start=0, limit=1) + ps.pwm("", ('F', 9), 2, start=1, limit=1) + ps.uart("2", ('F', 8), 1) + ps.sdmmc("2", ('F', 0), 2) + ps.eint("", ('F', 0), 3, start=18, limit=4) + ps.pwm("", ('F', 4), 3, start=2, limit=1) + ps.eint("", ('F', 5), 3, start=7, limit=1) + ps.eint("", ('F', 6), 3, start=28, limit=4) # Bank G - ps.gpio("", ('G', 0), "G", 0, 0, 32) - ps.rgmii("", ('G', 0), "G", 1) - ps.ulpi("2", ('G', 20), "G", 1) - ps.rgbttl("1", ('G', 0), "G", 2) - ps.quadspi("", ('G', 26), "G", 3) - ps.flexbus2("", ('G', 0), "G", 3) - ps.sdmmc("1", ('G', 24), "G", 3, limit=2) - ps.sdmmc("1", ('G', 28), "G", 2, start=2) + ps.gpio("", ('G', 0), 0, 0, 32) + ps.rgmii("", ('G', 0), 1) + ps.ulpi("2", ('G', 20), 1) + ps.rgbttl("1", ('G', 0), 2) + ps.quadspi("", ('G', 26), 3) + ps.flexbus2("", ('G', 0), 3) + ps.sdmmc("1", ('G', 24), 3, limit=2) + ps.sdmmc("1", ('G', 28), 2, start=2) # EOMA68 scenario. not totally complete (some GPIO needed for PMIC) # One interface to be connected to the MCU to give RTC and boot/dbg diff --git a/src/spec/minitest.py b/src/spec/minitest.py index f55b32e..9c2b600 100644 --- a/src/spec/minitest.py +++ b/src/spec/minitest.py @@ -61,26 +61,26 @@ def pinspec(of): ps = PinSpec(pinbanks, fixedpins, function_names) # Bank B, 16-47 - ps.gpio("", ('B', 0), "B", 0, 0, 28) - ps.rgbttl("", ('B', 0), "B", 1, limit=23) - ps.spi("0", ('B', 10), "B", 2) - ps.quadspi("", ('B', 4), "B", 2) - ps.uart("0", ('B', 16), "B", 2) - ps.i2c("2", ('B', 18), "B", 2) - ps.pwm("", ('B', 21), "B", 2, 0, 3) - ps.sdmmc("0", ('B', 22), "B", 3) - ps.eint("", ('B', 0), "B", 3, 0, 4) - ps.eint("", ('B', 20), "B", 2, 4, 1) - ps.eint("", ('B', 23), "B", 1, 5, 1) - ps.sdmmc("1", ('B', 4), "B", 3) - ps.jtag("1", ('B', 10), "B", 3) - ps.uartfull("0", ('B', 14), "B", 3) - ps.uartfull("1", ('B', 18), "B", 3) - ps.jtag("0", ('B', 24), "B", 2) - ps.spi("1", ('B', 24), "B", 1) - ps.i2c("0", ('B', 0), "B", 2) - ps.uart("1", ('B', 2), "B", 2) - ps.uart("2", ('B', 14), "B", 2) + ps.gpio("", ('B', 0), 0, 0, 28) + ps.rgbttl("", ('B', 0), 1, limit=23) + ps.spi("0", ('B', 10), 2) + ps.quadspi("", ('B', 4), 2) + ps.uart("0", ('B', 16), 2) + ps.i2c("2", ('B', 18), 2) + ps.pwm("", ('B', 21), 2, 0, 3) + ps.sdmmc("0", ('B', 22), 3) + ps.eint("", ('B', 0), 3, 0, 4) + ps.eint("", ('B', 20), 2, 4, 1) + ps.eint("", ('B', 23), 1, 5, 1) + ps.sdmmc("1", ('B', 4), 3) + ps.jtag("1", ('B', 10), 3) + ps.uartfull("0", ('B', 14), 3) + ps.uartfull("1", ('B', 18), 3) + ps.jtag("0", ('B', 24), 2) + ps.spi("1", ('B', 24), 1) + ps.i2c("0", ('B', 0), 2) + ps.uart("1", ('B', 2), 2) + ps.uart("2", ('B', 14), 2) # Scenarios below can be spec'd out as either "find first interface" # by name/number e.g. SPI1, or as "find in bank/mux" which must be -- 2.30.2