From 163653dc702e78f75f4cfbf3e70c8ebef97bb675 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 23 Jul 2018 14:18:38 +0100 Subject: [PATCH] reset uarts with sp_reset not uart_reset --- src/bsv/peripheral_gen/quart.py | 2 +- src/bsv/peripheral_gen/uart.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/bsv/peripheral_gen/quart.py b/src/bsv/peripheral_gen/quart.py index 0d314dd..cc0f311 100644 --- a/src/bsv/peripheral_gen/quart.py +++ b/src/bsv/peripheral_gen/quart.py @@ -15,7 +15,7 @@ class quart(PBase): def mkslow_peripheral(self, size=0): return " Uart16550_AXI4_Lite_Ifc quart{0} <- \n" + \ " mkUart16550(clocked_by sp_clock,\n" + \ - " reset_by uart_reset, sp_clock, sp_reset);" + " reset_by sp_reset, sp_clock, sp_reset);" def _mk_connection(self, name=None, count=0): return "quart{0}.slave_axi_uart" diff --git a/src/bsv/peripheral_gen/uart.py b/src/bsv/peripheral_gen/uart.py index c757c83..1533d7f 100644 --- a/src/bsv/peripheral_gen/uart.py +++ b/src/bsv/peripheral_gen/uart.py @@ -16,7 +16,7 @@ class uart(PBase): def mkslow_peripheral(self, size=0): return " Ifc_Uart_bs uart{0} <- \n" + \ " mkUart_bs(clocked_by sp_clock,\n" + \ - " reset_by uart_reset, sp_clock, sp_reset);" + " reset_by sp_reset, sp_clock, sp_reset);" def _mk_connection(self, name=None, count=0): return "uart{0}.slave_axi_uart" -- 2.30.2