From 166d8dd62db7f7ccee53560a5824cb51b272292b Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 18 Jun 2021 13:03:07 +0100
Subject: [PATCH]

---
 openpower/sv/propagation.mdwn | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/openpower/sv/propagation.mdwn b/openpower/sv/propagation.mdwn
index 16bf2b884..cb85c9f13 100644
--- a/openpower/sv/propagation.mdwn
+++ b/openpower/sv/propagation.mdwn
@@ -60,11 +60,13 @@ as follows:
 * Starting from bit 32 of the 4th SPR, in batches of 40 bits the Shift
   Registers are stored.
 
+```
                0            31 32         63
     SVREMAP0   context 0       context 1
     SVREMAP1   context 2       context 3
     SVREMAP2   context 4       context 5
     SVREMAP3   context 6       
+```
 
 When each LSB is nonzero in any one of the seven Shift Registers
 the corresponding Contexts are looked up and merged (ORed) together.
-- 
2.30.2